The Expanded Very Large Array

							       EVLA Monitor and Control

                 Module Interface Board (MIB)
                            Design


Author               EVLA Monitor & Control Hardware PDR   1
Wayne M. Koski                 March 13, 2002
                 MIB Block Diagram

                      Ethernet                        Parallel
                      Interface                       Interface
                                         Embedded
                                         Controller
                      Flash                           Serial
                      Memory                          Interface


                      Data Storage                    Address
                      Memory                          Logic


                      Reset                           Control
                      Logic                           Logic


                      Timing                          A/D or
                      Logic                           D/A
                                                      Logic




                                  MIB Block Diagram



Author             EVLA Monitor & Control Hardware PDR            2
Wayne M. Koski               March 13, 2002
                 Embedded Controller

• Infineon TRICore TC11IB
      System On a CHIP
     12 MHZ External Clock
     1.5 MBytes RAM
      Hardware/Software Resets
      Watchdog Timer
      Sleep Modes
      Seven Thirty-Two Bit Timers
Author              EVLA Monitor & Control Hardware PDR   3
Wayne M. Koski                March 13, 2002
                 Embedded Controller

• Infineon TC11IB – Interfaces
      Media Independent Interface (MII)
      PCI Bus – Version 2.2 @33MHz
      MultiMediaCard Interface
      Two Asynchronous Serial Ports
      One Synchronous Serial Port (SPI)
      Standard External Bus Interface

Author              EVLA Monitor & Control Hardware PDR   4
Wayne M. Koski                March 13, 2002
                 Ethernet Interface

• Ethernet Interface – 100 MBit/second
     Translation Chip – Intel LXT971A
     Fiber Optic Transceiver – Infineon
       V23809-C8-C10




Author            EVLA Monitor & Control Hardware PDR   5
Wayne M. Koski              March 13, 2002
                 Flash Memory

• Flash Memory – Checksum
     Code Storage
        MIB – Boots Main Operation Code
        Device – Device Specific Code
     Parameter Storage
        MIB – Loads Slot ID and Parameters
        Device – Device Parameters
     All Code Documented
Author           EVLA Monitor & Control Hardware PDR   6
Wayne M. Koski             March 13, 2002
                 Data Storage Memory

• Data RAM – Inside TC11IB
     Code Storage
     Parameter Storage
     Communication Data Storage




Author              EVLA Monitor & Control Hardware PDR   7
Wayne M. Koski                March 13, 2002
                    Reset Logic

• Reset Logic
     Power Supervisor – Maxim MAX706
     Watchdog Protection – TC11IB
     Devices Must Reset into Safe Condition




Author           EVLA Monitor & Control Hardware PDR   8
Wayne M. Koski             March 13, 2002
                 Timing Logic

• Timing Logic
     19.2 Hz Timing Signal (Transition)
     1 PPS Timing Signal
     10 Second Timing Signal
     10 ms Timing Signal
     Devices May Require Precise Timing
        Hardware Timing

Author           EVLA Monitor & Control Hardware PDR   9
Wayne M. Koski             March 13, 2002
                 Parallel Interface

• Parallel Interface
     Thirty-Two Bits Transfer
     PCI Bus
     External Bus




Author            EVLA Monitor & Control Hardware PDR   10
Wayne M. Koski              March 13, 2002
                 Serial Interfaces

• Serial Interfaces
     Asynchronous Ports
        One Two Wire Port
        One Modem Port
     Synchronous Ports
        SPI Port – UP to Sixteen Bits
        How are Select Lines Provided?

Author           EVLA Monitor & Control Hardware PDR   11
Wayne M. Koski             March 13, 2002
                 Address Logic

• Address Logic
     Memory Mapped Functions
     Devices
       Multiplexed Address/Data Bus
       Separate Address/Data Bus




Author           EVLA Monitor & Control Hardware PDR   12
Wayne M. Koski             March 13, 2002
                 Control Logic

• Control Logic
     Peripheral Interfaces
        Motorola or Intel or Both
     NRAO Generated Interface
        VLBA Model
        Dual Port RAM Model


Author           EVLA Monitor & Control Hardware PDR   13
Wayne M. Koski             March 13, 2002
                 A/D or D/A Logic

• A/D or D/A Logic
     A/D Logic
       Device
     D/A Logic
       Device




Author            EVLA Monitor & Control Hardware PDR   14
Wayne M. Koski              March 13, 2002