A AND B
Light Bulb q OR
F(x,y) = x.y
F(x,y) = x.y + x'.y'
G(x,y,z)=x'yz + x'yz' + xy'z' + x'y'z'
Canonical SOP Form
x y z
Canonical POS Form
a b c
Real Logic Gates
(1) real logic gates need to be connected to a power source
(2) real logic gates do not respond instantly to changes in their input values
(3) the outputs of two logic gates cannot be connected directly to each other
(4) there is a limit to the number of inputs that can be connected to a logic gate
(5) integrated circuits stop working if you let out the magic smoke.
Electrical Characteristics of Digial Logic
Power - Power, P, is the rate at which energy is used (dissipated). Measured in Watts,
the power used by an electronic component is related to the voltage drop, V, across the
component, the resistance, R, of the component, and the current, I, in the component by,
P = VxI or P = V2/R or P = I2xR
Impedance - Impedance is a measure of the resistance of a component to alternating
current (AC) signals, and is a function of the frequency of the AC signal for most
components. A logic gate has a very high input impedance, which means that they only
need a small current to set their voltage levels to high or low. Logic gates have a very
low output impedance, which means that they can provide a relatively high current to
drive a circuit high or low. Due to these differences in impedances, logic gate inputs can
be connected to each other while logic gate outputs cannot.
Depth of Circuit
TTL Gate Delay
Common TTL Integrated Circuits
Typical Laboratory Setup
Implementing Order of Precedence in a Circuit
The Relationship Between Venn Diagrams and Karnaugh Maps
Examples of Simplifying Groups of Terms in K-Maps
Karnaugh Maps (K-Maps)
We will use a K-map to simplify the follwing expression.
F(x,y,z) = xy’z’ + x’y’z + xz’ + y’z + x’
First we note that there are three variables in the expression F( ), therefore our K-map will
have 23=8 cells.
Next we decide where each variable will be represented.
Now we arrange the literal values for x,y and z so that binary vectors that are next to each
other differ by only one bit. In other words we make sure that logically adjacent vectors
are also physically adjacent.
00 01 11 10
Now we place ones (true values) into the K-map to show which binary vectors satisfiy
the expression F( ).
F(x,y,z) = xy’z’ + x’y’z + xz’ + y’z + x’
100 001 1-0 -01 0-- 00 01 11 10
100 001 000 1 1 1 1
110 101 001
010 1 1 1 1
Now we find the smallest number of the largest rectangular patterns of 1’s whose sizes are
integer powers of two. (Weird) That is the length of a selected rectangle of ones must be of
length 1,2,4,. . .,2n. Of course in this case 4 is the limit. We must choose a set of these
rectangles such that every 1 is in at least one of the rectangles. Here are a few candidates.
00 01 11 10 00 01 11 10
0 1 1 1 1 0 1 1 1 1
1 1 1 1 1 1 1 1
In each case we have contained all the 1’s in three rectangles of the required dimensions.
The middle case is better because it uses larger patterns.
Finally we convert these pattern back into terms in the simplified expression for F( ).
00 01 11 10
0 1 1 1 1
1 1 1 1 F(x,y,z) = x’ + y’ + z’
Comparing K-Map and Algebraic Simplification
There are Many Equivalent K-Maps Configurations
Examples of 4-Variable K-Maps
A K-Map "Tiles the Plane"
These terms are logically adjacent even though
they appear on opposite corners of the K-Map
Max-Terms (Zeros) Can Be Used to Populate a K-Map
The Importance of "Don't Care" States
Sometimes the value of a Boolean function for certain bit patterns is not important. For
example, when the input is a binary-coded decimal (BCD) the values for input greater
than 9 do not matter.
In these cases we can use the don't care states either as 0's or 1's to simplify the circuit.
Sample Problems for Transforming Boolean Expressions
to Other Equivalent Forms
Note: For those of you who are unfamiliar with the conversions between SOP, POS,
minterms and maxterms please work the following exercises as practice. If you have
any questions please feel free to ask in class or contact me directly.
Sum-of-Products Product-of-Sums minterms Maxterms
For each row, use the representation of the Boolean expression given to derive the other
representations. Some representations will be too large to fit conveniently in the table.
Step 1: Express the Boolean function to be simplified in canonical SOP form.
Step 2: Using minterms or by direct conversion, generate the binary vector form for each product
Step 3: Arrange the binary vectors into groups according to the number of 1's in the vectors.
Step 4: Compare vectors in consecutive groups replacing each adjacent pair with their corresponding
implicant. (Note: When comparing vectors with i 1's to vectors with i+1 1's, two vectors are adjacent
when the positions of i 1's match. The implicant is generated by replacing the unmatched 1 with a
dash.) Build a new list comprised of the newly generated implicants and any binary vectors not part
of an adjacent pair.
Step 5: Repeat Steps 3 and 4 on the newly generated list until no new implicants are found. (Note: A
pair of implicants containing i and i+1 1's are adjacent when the positions of all dashes match and the
positions of i 1's match. As with binary vectors the new implicant is generated by replacing the
unmatched 1 with a dash.) The final list is comprised of the prime implicants.
Step 6: Place list of prime implicants into a Prime Implicant table that compares them to the original
list of minterms. Find the essential prime implicants and determine which minterms are covered by
this subset of implicants. (Note: The essential prime implicants are those that are the only implicants
to cover a particular minterm.)
Step 7: Find the smallest subset of remaining implicants needed to cover the remainder of the
minterms of the original Boolean function. (Note: This step can be computationally expensive.)
Quine-McKluskey - An Example Problem
Finding Logically Adjacent Terms
Reduced Terms Must Represent all the Original Terms
Finding Logically Adjacent Reduced Terms
Listing the Prime Implicants
Minimal Set of Essential Prime Implicants