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					ICE Emulator for 68000

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  ICE In-Circuit Emulator .................................................................................................................            !

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       ICE Emulator for 68000 ...........................................................................................................               1
          Warning .................................................................................................................................     3

          Quick Start ............................................................................................................................      4

          Troubleshooting ...................................................................................................................           5
             Hang-Up                                                                                                                                    5
             Dual-Port Errors                                                                                                                           6
          Configuration ........................................................................................................................        7

          General Settings and Restrictions ......................................................................................                      9
             Restrictions                                                                                                                               9
             SYStem.Clock                                                                                                 Clock generation             10
             SYStem.Mode                                                                                       Select emulation modes                  10
             SYStem.Line                                                                                                         CPU signals           11
             SYStem.RESetOut                                                                                           RESET peripherals               11
             SYStem.Option V33                                                                                                Voltage sense            11

          Memory Classes ...................................................................................................................           12

          State Analyzer .......................................................................................................................       13
             Keywords for the Trigger Unit                                                                                                             13
             Keywords for the Display                                                                                                                  15
             Dequeueing                                                                                                                                15

          Emulation Frequency ...........................................................................................................              16

          Support ..................................................................................................................................   17
             Compilers                                                                                                                                 17
             3rd Party Tool Integration                                                                                                                18
             Realtime Operation Systems                                                                                                                19




ICE Emulator for 68000                                                     1
ICE Emulator for 68000

                                                                              Version August, 11 2010

   SP:0017BE      \\MCC\mcc\sieve+36                                               ........... MIX        EI

   E:w.d.l
    addr/line     code                  label           mnemonic                  comment
           571                                                flags[ k ] = FALSE;
    SP:0017BE     4212                                  clr.b   (a2)
           572                                                k += prime;
    SP:0017C0     D5C4                                  adda.l d4,a2              ; prime,a2
    SP:0017C2     D684                                  add.l    d4,d3            ; prime,k
    SP:0017C4     7012                                  moveq    #12,d0           ; #18,d0
    SP:0017C6     B083                                  cmp.l    d3,d0            ; k,d0
    SP:0017C8     6CF4                                  bge      $17BE

   E::w.v.chain %r %m ast ast.left                                           E::w.v.ref
     0x0 (0) (word = 0x0     NULL,                                           flags = (1, 1, 1, 1, 1
              count = 12346,                                                 k = 3
              left = 0x5200     (word = 0x0, count = 12,                     prime = 3
              right = 0x5600     (word = 0x0, count = 0,                     i = 0
              field1 = 1,                                                    count = 0
              field2 = 2),                                                   vint = 1
     0x1 (1) (word = 0x0     NULL,
              count = 12,
              left = 0x5756     (word = 0x0, count = 34,
              right = 0x5680     (word = 0x0, count = 0,




      NOTE:               This description is for the 68000 ONLY probe. This probe has been replaced by
                          the new 68300 base module.




   For general informations about the In-Circuit Debugger refer to the ”ICE User’s Guide” (ice_user.pdf). All
   general commands are described in ”IDE Reference Guide” (ide_ref.pdf) and “General Commands and
   Functions”.




ICE Emulator for 68000                              2
Warning



     NOTE:               Do not connect or remove probe from target while target power is ON.

                         Power up:   Switch on emulator first, then target
                         Power down: Switch off target first, then emulator




ICE Emulator for 68000                            3                                             Warning
Quick Start

   tbd.




ICE Emulator for 68000   4   Quick Start
Troubleshooting


Hang-Up

   If you are not able to stop the emulation, there may be some typically reasons:



      Double Address Error            After a double address error the CPU is in halt state, use the
                                      SYStem.Up command to start again. Double address errors
                                      normally occur when the stack pointer is out of memory.

      No DTACK Signal                 If not TIMOUT is specified, the CPU cycle is not completed if the
                                      DTACK signal fails. On memory display windows BERR signals are
                                      not accepted. You can verify this state by checking the CYCLE
                                      signal with the counter function. If low, the CPU is stopped in the
                                      middle of the cycle. If request mode is selected, a dual-port error
                                      occurs and the emulator system changes to reset state.

      Clock Error                     The clock line to the emulator is very critical. Check the driver and
                                      the clock on the emulation head. The device in the emulator is
                                      specified for 8 to 16.7 MHz. If running below 8 MHz calculation
                                      errors in the CPU may occur. Change the device in the emulator in
                                      this case.

      Interrupt Request               If all IPL signals are active low at the same time (NMI request) you
                                      can not use an asynchronous break. This interrupt level in usually
                                      used for fatal errors in target systems only. If only program
                                      breakpoints are used, no restriction in using interrupt level 7 is
                                      known.

      Analyzer Function               If you switch off the analyzer and the CPU has stopped operation,
                                      an invalid display occurs. Make a SYStem.Up command to see the
                                      true trace information.




ICE Emulator for 68000                               5                                    Troubleshooting
Dual-Port Errors

   To realize the dual-port access (emulation memory) the BR-line of the CPU is used. Dual-port accesses are
   allowed only while no external request to the bus occurs and the CPU cycle is completed. If the emulation
   CPU is in RESET state of the CPU the system controller may always access the emulation memory.

   Dual-port errors may occur by the following conditions:

   1. The length of the CPU cycle is extended by wait cycles, so that the request timeout signal is
         generated.
   2.    External DMA requests (single cycles) are too long.

   To solve problems with dualport error first increase the SYStem.TimeReq value. Be sure that the
   SYStem.TimeOut value is bigger than the access time limit. If it is not possible to solve the problem by
   changing the values, you must switch to DENIED mode. In this mode no access to memory is possible while
   running realtime emulation. The internal dual-port access can increase the reaction time for external DMA
   requests. The performance reduction by the dual-port access is typically 1% with some data windows (dual-
   ported) on the screen and may be at max. 5% when using dynamic emulation memory.




ICE Emulator for 68000                               6                                   Troubleshooting
Configuration

   The configuration between 68000 and 68010 is done by changing the CPU and the DIP-switches in the
   emulation head. To change to 68008 the cable must be changed also.

        Switch position          ON    = (+)         OFF = (-)
   Switch position       M68000 16 MHz



                    --------



                                            M68000-16                      --+-----


                                                                   ++++    ++++++++


                                                                   ----    --------


                                                                   ----    --------


                                                                           ------+-




   Switch position M68010 10 MHz



                    --------



                                            M68010-10                      -+------


                                                                   ----    --------


                                                                   ----    --------


                                                                   ++++    ++++++++


                                                                           -----++-




ICE Emulator for 68000                           7                                       Configuration
   Switch position M68008 10 MHz



                    ++++++++



                                                   -+------


                                            ----   --------


                                            ++++   ++++++++


                                            ----   --------

                                   M68008
                                                   -----++-




ICE Emulator for 68000             8                      Configuration
General Settings and Restrictions


Restrictions


     Memory Set-up         All 68000-type in-circuit-emulators need memory in the supervisor
                           stack area (SSP) to break correctly. If you get an invalid pc value
                           after stopping the program, the SSP register may be outside the
                           memory area.

     Register Set-up       The SR register trace flag must not be set to 1.

     Emulation Frequency   The 68000 probe uses a 16 MHz CPU device. The device is
                           specified for 8 to 16.7 MHz. If running below 8 MHz calculation
                           errors in the CPU may occur. Change the device in the emulator in
                           this case.




ICE Emulator for 68000                   9                  General Settings and Restrictions
SYStem.Clock                                                                            Clock generation


      Format:             SYStem.Clock <option>


      <option>:           VCO
                          High
                          Mid
                          Low




      VCO                 Variable frequency 1…35 MHz.

      Low, Mid,           2.5, 5.0 or 10.0 MHz.
      High




SYStem.Mode                                                                  Select emulation modes


      Format:             SYStem.Mode <mode>


      <mode>:             ResetDown
                          ResetUp
                          AloneInt
                          AloneExt
                          EmulInt
                          EmulExt




      Reset Down                 Target is down, all drivers are in tristate mode.

      Reset Up                   Target has power, drivers are logically in inactive state, but not tristate.

      Alone Internal             Probe is running with internal clock, driver inactive. This mode is used for
                                 'standalone' operation.

      Alone External             Probe is running with external clock, driver inactive.

      Emulation Internal         Probe is running with internal clock, strobes to target are generated.

      Emulation External         Probe is running with external clock, strobes to target are activated.


   In active mode, the power of the target is sensed and by switching down the target the emulator changes to
   RESET mode. The probe is not supplied by the target. When running without target, the target voltage is
   simulated by an internal pull-up resistor.


ICE Emulator for 68000                              10                   General Settings and Restrictions
SYStem.Line                                                                                    CPU signals


      Format:              SYStem.Line <option>


      <option>:            FCode <class>
                           BusReq [ON | OFF]


   If no real-time emulation occurs then the CPU's status lines and the strobe lines must contain certain values
   in order that no memory accesses are triggered (inactive). However, depending upon the target system
   used, certain exceptions to this rule may become necessary.



      FCode               CPU status lines are inactive. Default setting for this status is the same as for
                          memory-read in user mode (USERDATA READ).

      BusReq              Under normal conditions DMA accesses are only permitted if the emulator is
                          executing a real-time program. If constant DMA is required then this function
                          must be set.
                              sys.s br on                     ; Set DMA function




SYStem.RESetOut                                                                     RESET peripherals


      Format:              SYStem.RESetOut


   This function triggers the CPU RESET command which, in turn, initializes the peripherals.



       sys.resetout               ; Initialize peripherals




SYStem.Option V33                                                                          Voltage sense


      Format:              SYStemOption V33 [ON | OFF]


   The threshold level for the power-down sense is reduced to 2.8 V for operation with 3.3 V targets.




ICE Emulator for 68000                              11                   General Settings and Restrictions
Memory Classes



     Memory Class        Description

     FC0                 Function-Code 0

     FC1                 USER-DATA

     UD                  USER-DATA

     FC2                 USER-PROGRAM

     UP                  USER-PROGRAM

     FC3                 Function-Code 3

     FC4                 Function-Code 4

     FC5                 SUPERVISOR-DATA

     SD                  SUPERVISOR-DATA

     FC6                 SUPERVISOR-PROGRAM

     SP                  SUPERVISOR-PROGRAM

     FC7                 Function-Code 7

     CPU                 CPU Function-Code

     U                   User

     S                   Supervisor

     D                   Data

     P                   Program

     C                   Memory access by CPU

     E                   Emulation memory access

     A                   Absolute (physical) memory access

     USR                 User defined memory access

                         (monitor extension)



ICE Emulator for 68000                     12                Memory Classes
State Analyzer


Keywords for the Trigger Unit

    DMACycle             DMA cycle
    Read                 CPU read cycle
    TimeOut              DTACK Timeout (not HA120)
    Write                CPU write cycle
    Wait0 … Wait6        Waitstates 0... 6
    WaitX                Waitstates greater 6
    CPU - FC7            Interrupt acknowledge
    FC0 … FC7            Function code 0 to 7
    IPL0 … IPL2          Interrupt priority level lines
    SupervisorData       Supervisor data area (FC5)
    SupervisorProgram    Supervisor program area (FC6)
    UserData             User data area (FC1)
    UserProgram          User program area (FC2)
    VMA                  VMA cycle


    AutoVECtor           FC7 * R * VMA
    Data                 UD + SD
    IACK                 FC7 * R
    IR                   IPL0 + IPL1 + IPL2
    IR1 … IR6            Interrupt request 1 to 6
    IR7 - NMI            Interrupt request 7, or NMI
    Program              SP + UP
    ReadData             R*D
    Supervisor           SP + SD
    User                 UP + UD
    WriteData            W*D
    BYTE                 Byte transfer
    WORD                 Word transfer
    LDS                  Lower data strobe
    UDS                  Upper data strobe




ICE Emulator for 68000                         13         State Analyzer
   For not CPU-specific keywords see non-declarable input variables in ”Analyzer Trigger Unit
   Programming Guide” (analyzer_prog.pdf).




ICE Emulator for 68000                           14                                     State Analyzer
Keywords for the Display


       WR                        Write line
       LDS                       Lower Data Strobe
       UDS                       Upper Data Strobe
       DMA                       DMA cycle between this and last record
       VMA                       VMA cycle
       IR                        Interrupt request level
       IPL.0                     Interrupt request line 0
       IPL.1                     Interrupt request line 1
       IPL.2                     Interrupt request line 2
       BR                        Bus request
       BG                        Bus grant
       BGACK                     Bus grant acknowledge
       BERR                      Bus access error
       VPA                       VPA cycle
       HALT                      Halt cycle
       RES                       Reset cycle
       Wait                      Number of inserted wait cycles,
                                 for more than 6 a 'X' appears.




Dequeueing

   The disassembled lines in the analyzer are displayed prior to the resulting data cycles. This dequeueing fails
   for commands which have not a constant number of data cycles.

   Problems with Prefetches:

   •          short forward conditional branches to addresses already prefetched




ICE Emulator for 68000                                15                                        State Analyzer
Emulation Frequency

   The emulation probe is designed to run with CPU's up to 16.6 MHz.




ICE Emulator for 68000                            16                   Emulation Frequency
Support


Compilers


   Language        Compiler        Company           Option      Comment
   ADA             ALSYS-ADA       ALSYS             IEEE        limited support
                                                                 (IEEE)
   ADA             TELESOFT-ADA    Telesoft          IEEE        limited support
                                                                 (IEEE)
   ASM             VERSADOS-ASM    Freescale         VERSADOS    symbols only
   ASM             ASM68K          Mentor Graphics   IEEE        Source level
                                                                 debugging
   ASM             OS-9 ASSEMBLER Microware          ROF         Source level
                                                                 debugging
   ASM             RTOS            RTOS-UH           SYM/LOC     Source level
                                                                 debugging
   ASM             AS68            TASKING           IEEE
   C               ORGANON         CADUL             BOUND
   C               C68K            Cosmic            COSMIC
   C               D-CC            Diab-Data         IEEE
   C               D-CC            Diab-Data         ELF/DWARF
   C               GNU-C           FSF               ELF/DWARF
   C               GNU-C           FSF               COFF
   C               GNU-C           FSF               ELF/DWARF
   C               HICROSS-68K     Freescale         HICROSS
   C               CC68K           Freescale         COFF
   C               GREEN HILLS C   Greenhills        COFF
   C               HP-64000 C      HP                HP          no type/locals info
   C               HT-68K          Hitech            HITECH
   C               ICC68K          Introl            ICOFF
   C               MCC             Mentor Graphics   IEEE
   C               ULTRA-C         Microware         ROF         OS/9 compilers
   C               OS/9-C          Microware         ROF
   C               CROSSCODE-C     SDSI              SDS
   C               SUN3-CC         SUN               DBX
   C               SCC68K          Sierra            COFF
   C               ICC68K          TASKING           COFF
   C               ICC68K          TASKING           IEEE
   C               TT-68K          TASKING           IEEE
   C               TCC68K          TASKING           AOUT        only source and
                                                                 syms
   C               TEKTRONIX C     Tektronix         COMFOR
   C++             ORGANON C++     CADUL             BOUND
   C++             D-C++           Diab-Data         ELF/DWARF

ICE Emulator for 68000                     17                                 Support
   Language        Compiler          Company                Option      Comment
   C++             GNU-C++           FSF                    DBX
   C++             GNU-C++           FSF                    ELF/DWARF
   C++             HICROSS-68K       Freescale              HICROSS
   C++             CODEWARRIOR       Freescale              ELF/DWARF
   C++             CCC68K            Mentor Graphics        IEEE
   C++             CROSSCODE C++     SDSI                   SDS
   MODULA          MCDS              Freescale              MCDS
   MODULA          MOD68K            Introl                 ICOFF
   MODULA          MCS2              MCS                    COFF
   PASCAL          MPC               Mentor Graphics        IEEE
   PEARL           RTOS              RTOS-UH                SYM/LOC     no type/locals info




3rd Party Tool Integration


   CPU                   Debugger               Company                 Host
   ALL                   X-TOOLS / X32          blue river software     Windows
   ALL                   CODEWRIGHT             Borland                 Windows
   ALL                   EASYCODE               EASYCODE GmbH           Windows
   ALL                   ECLIPSE                Eclipse.org             Windows
   ALL                   LDRA TOOL SUITE        LDRA Software Techn.    Windows
   ALL                   ATTOL TOOLS            MicroMax                Windows
   ALL                   VISUAL BASIC           Microsoft               Windows
                         INTERFACE
   ALL                   LABVIEW                NATIONAL                Windows
                                                INSTRUMENTS
   ALL                   CODE::BLOCKS           Open Source             -
   ALL                   RAPITIME               Rapita Systems Ltd.     Windows
   ALL                   DA-C                   RistanCASE              Windows
   ALL                   RHAPSODY IN MICROC     Telelogic               Windows
   ALL                   RHAPSODY IN C++        Telelogic               Windows
   ALL                   WINDOWS CE PLATF.      Windows                 Windows
                         BUILDER
   68K                   OS68 DEBUGGER          Enea OSE Systems AB     -
   68K                   SDT CMICRO             Telelogic               Windows
   68K                   DIAB RTA SUITE         Windriver Systems       Windows




ICE Emulator for 68000                     18                                        Support
Realtime Operation Systems


   Name                  Company                Comment
   AdaWorld ARTK         Aonix
   AMX                   KADAK Products
   ChorusOS              Sun Microsystems
   CMX-RTX               CMX Company
   MQX                   MQX Embedded           2.40 and 2.50
   MTOS-UX               IPI
   Nucleus PLUS          Mentor Graphics
   OS-9                  Microware
   OSE Classic           Enea OSE Systems       (OS68)
   OSE Delta             Enea OSE Systems       4.x and 5.x
   pSOS+                 Integrated Systems     2.1 to 2.5, 3.0
   RealTime Craft        GSI tecsi              (XEC68k)
   RTXC 3.2              Quadros Systems Inc.
   SDT-Cmicro            Telelogic
   uCLinux               Freeware II            Kernel Version 2.4 and 2.6
   VRTX32                Mentor Graphics
   VRTXmc                Mentor Graphics
   VRTXsa                Mentor Graphics
   VxWorks               Wind River Systems     5.x and 6.x




ICE Emulator for 68000                  19                                   Support

				
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