WLAN Baseband Tx Module Testing using High-Speed DAQ Cards
Cheng-Tao Hu, Senior R&D Manager, ADLINK
Chris Ni, Product Manager, ADLINK
Companies have developed high-speed data acquisition (DAQ) cards and
claimed that they are applicable for military radar, supersonic, digital broadcast
signal analysis, or inkjet cartridge system testing applications. DAQ cards have
sampling rates of 20-100 MS/s, a bandwidth of 30-60MHz, and the ability to
provide simultaneous software-selectable multigroup analog signal inputs to
meet the demands of these applications. However, published examples of DAQ
cards employed in these applications are scarce. For this reason, this article will
use ADLINK Technology’s PXI-9820, their latest high-speed DAQ card, as a
model to detail possible uses in wireless LAN (WLAN) development and all
aspects of mass production testing equipment.
Why WLAN? Several of Taiwan’s leading wireless broadband solution
providers predict a huge growth for 2005. Gemtek, forecasted approximately
90% of notebook computers sold in 2005 will include WLAN modules. They go
on to state that the 802.11g will replace the standard module, 8.02.11a+g, in
the second quarter with an expected output of 20-25 million units for the entire
year. CyberTAN Technology has also stated 25 million units will sell in 2005.
And Global Sun Technology, after merging with Cameo, has estimated that it
will sell eight million units. These figures suggest an enormous growth potential
for WLAN products and the largest market share will be won by the company
that bring their products to market the quickest. Therefore, companies must
ensure two things:
1. Engineers can effectively resolve possible issues during the
development stage and that their designs pass through comprehensive
2. The production lines must use adequate testing equipment to ensure
both product quality is the best possible and production capacity meets
However, companies are faced with difficult business decisions the cost and
effectiveness of existing testing platforms. Companies, chip designers and
system manufacturers, for example, must decide whether or not to invest the
funds to purchase a large quantity of equipment for use in R&D departments
and production lines that test one WLAN card per minute.
The trend of chip and equipment manufacturers is moving toward enhancing
test lab facilities and utilizing the latest equipment to simulate RF network
environment to test the dependability and scalability of networking products
and solutions. This article is centered on ADLINK’s latest low-cost and flexible
PXI-9820 high-speed DAQ card, suitable for mass-produced WLAN transmitter
module real-time error vector magnitude (EVM) testers aimed at chip designers
and systems manufacturers.
The module has three major components: a WLAN transmitter, a high-speed
DAQ card with controller, and a software module interface for EVM calculation
1. WLAN Transmitter:
a. Wireless card (802.11a) + card bus: WLAN transmitter
b. Analog device instrument (ADI) evaluation board: Converts
differential signals I+, I-, and Q+, Q- to single-ended output
circuit signals I and Q.
2. High-Speed DAQ Card and Controller:
a. ADLINK PXI-3800: 1.6GHz Intel® Pentium® M PXI controller
with real-time signal calculations (see Figure 1).
b. ADLINK PXI-2506: 3U, 6 slot PXI portable chassis (see Figure
c. ADLINK PXI-9820: 3U PXI 65MS/s, 14-bit digitizer with
128MB SDRAM on-board for I-Q signal acquisition (see
3. EVM Calculation and Analysis Software Module Interface
a. ADLINK’s in-house wireless card signal control program:
Controls constant generation and transmission of WLAN card
b. ADLINK’s in-house real-time I-Q signal analysis program:
Analyzes discrete fast Fourier transforms, 64-QAM, EVM
calculations, and more.
Figure 1. ADLINK PXI-3800 Controller.
Figure 2. ADLINK PXI-2506 Portable Chassis.
Figure 3. ADLINK PXI-9820 High-Speed DAQ Card.
As shown in the test system block diagram of Figure 4, ADLINK’s PXI-3800
controller executes a WLAN card signal control program where the card bus
triggers the WLAN card to send continuous Tx test signals. Output signals from
the network card are differential signals I+, I- and Q+, Q-. Because the DAQ
card uses two-channel single-ended inputs, an Analog Device Instrument (ADI)
evaluation board converts the signal from differential to single-ended.
Baseband I-Q signals are sent to the PXI-9820 and analyzed using ADLINK’s
in-house real-time I-Q signal analysis program to perform discrete Fourier
transforms (DFT) and EVM.
Figure 4. Baseband Transmitter Test System Block Diagram.
Figure 5. Complete Baseband Transmitter Test System.
The IEEE 802.11a specification defines WLAN transmission/reception
principles (see Figure 6). The physical layer (PHY) utilizes orthogonal
frequency division multiplexing (OFDM) techniques to merge the majority of
the various frequency carriers into one signal to complete the transmission.
The transmitter (Tx) uses inverse fast Fourier transformations (IFFT) to
modulate the signal before transmitting each frame. I-Q modulation (I -
in-phase, Q - quadrature) is then used to separate I-Q signals. Finally, a RF
circuit is used to up convert signals from baseband frequency to 5GHz band
for transmission. The receiver (Rx) then down converts the RF signals to the
baseband, demodulates I-Q signals, and uses discrete fast Fourier
transforms (DFT) to convert each frame back to its original state.
For practical high-speed DAQ applications, the WLAN circuit and its signal
processing can be simplified in the following manner:
1. The RF circuitry is omitted for direct acquisition and analysis of
2. The I-Q demodulation circuit is implemented using two ADI evaluation
3. Rx frame synchronization and sampling will not be discussed. We
have set a simple threshold value following the single-ended I-Q
signals so that receivers will find the symbol boundary before
4. Detailed signal processing techniques will also not be discussed (data
descrambler, convolutional encoders, data interleaving, normalize
average power, windowing functions, etc.).
Figure 6. WLAN Tx/Rx Operations
Each time a frame structure, similar to Figure 7, is transmitted, the preamble
components (including two short and two long symbols) are modulated using
binary phase shift keying (BPSK). Signal and data components are modulated
using 64-QAM. The length of data is arbitrary.
Figure 7. Frame transmission structure.
Test Signal Measurement: The job of the test system is to test baseband
signals at a specific location (the testing point of Figure 6). Two sets of test
points, I+, I- and Q+, Q-, are separately connected after the circuit performs
guard interval (GI) addition. These two signal sets are differential signals of I
and Q. Using an ADI differential signal single-ended output circuit, we send the
I and Q signals to a PXI-9820 digitizer in a single-ended, two-channel mode.
The PXI-9820 sampling rate is set at 60MS/s with a resolution of 14 bits. Middle
trigger triggering mode is selected.
Test Signal Generation: The transmitter baseband signal frame is generated
by ADLINK's in-house WLAN card signal controller program. The program will
continuously send frames. The preamble and symbol sequences, including ten
periodic short (8s total) and two periodic long (8s total) training sequences, of
each frame are sequentially generated in accordance to the training symbol in
the 802.11a specification. Data length and content are arbitrary. Frame time
intervals are also arbitrary. For this test, Data length is set as 4096±n periods
with arbitrary time intervals.
Baseband Signal Analysis: Using correct triggering mode settings, the
PXI-9820 can accurately sample data at the start point of each frame.
Afterwards, the data of the entire frame is sent to the memory of the PXI-3800
controller. The PXI-3800’s computing power carries out real-time calculations
on all the data, in addition to executing the following operations on the entire
preamble and data components:
1. Convert the individual single-ended I and Q signals into a single complex
2. Using 80 points as one unit, discard the first 16 points of the cyclic
extension in each symbol and compute the FFT on the last 64 points.
3. Calculate first 4 units, then demodulate the FFT result using BPSK (two
short and two long training sequences).
4. Repeat steps (2) and (3), analyze continuous data units, and execute
64-QAM and constellation operations.
5. Calculate the signal EVM for a quantified reference value of
transmission quality and system design. An EVM is defined as:
Z (k ) R(k )
EVM dB 20*log10 k 1
where Z is the test signal, R is the ideal signal, M is the test symbol
number, and k is the sample number.
Figure 8 shows ADLINK’s I-Q signal analysis software interface. The green
signal in the upper portion represents the I signal. The red signal in the lower
portion represents the Q signal. The periodic waveform at the left of each signal
are the short and long preamble signal sequences. The random waveform to
the right is data. The lower left window, labeled “I/Q Vector for PLCP preamble
(BPSK),” displays the results of the preamble after BPSK encoding. The lower
right window, labeled “I/Q Vector for Data (64-QAM),” displays the constellation
diagram of the data after 64-QAM encoding. After processing this frame, the
system then captures the next frame in real-time.
Figure 8. Test results.
This process of developing systems for a specific application shows how
quickly low-cost and practical test equipment can be designed. It can also
easily be manufactured in large quantities by selecting a DAQ card with the
right specifications together with a fully-functional computer and adding a small
team of engineers to develop the software interface. By merely improving PHY
wireless digital signal processing capabilities, operators can then use this
system to verify Tx PHY system design performance or Rx signal processing
quality. Adding a vector signal generator (VSG) will enable the ability to
estimate Tx-Rx hardware design performance that can be applied to the
production line for product baseband performance verification. And by adding
up and down converter circuitry to the system, it will function like a regular
WLAN product tester.
The immense business opportunities for the WLAN companies mentioned
above, including chip designers and system manufacturers, will weigh heavily
on their investment in R&D design verification and production test equipment.
When next generation products are developed (such as multiple input, multiple
output (MIMO) for WLAN or ultra wide band (UWB)), will companies abandon
costly verification and test equipment and invest, yet again, in next generation
equipment? The WLAN product testing system outlined in this article not only
reduces development time but also provides a low-cost, scalable, and easily
producible solution for engineers and assemblers that is upgradeable for next
generation products. In fact, the same concept can be applied to TFT-TV,
set-top boxes, and the telecom industry. Selecting the right data acquisition
card is key to building a cost-effective testing system.