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PN Junctions Theory Dragica Vasileska Department of Electrical Engineering Arizona State University 1. PN-Junctions: Introduction to some general concepts 2. Current-Voltage Characteristics of an Ideal PN-junction (Shockley model) 3. Non-Idealities in PN-Junctions 4. AC Analysis and Diode Switching EEE 531: Semiconductor Device Theory I – Dragica Vasileska 1. PN-junctions - General Consideration: • PN-junction is a two terminal device. • Based on the doping profile, PN-junctions can be separated into two major categories: - step junctions - linearly-graded junctions ND N A ND N A ax p-side n-side p-side n-side Step junction Linearly-graded junction EEE 531: Semiconductor Device Theory I – Dragica Vasileska (A) Equilibrium analysis of step junctions EC qVbi (a) Built-in voltage Vbi: qVbi Ei E F p E F Ei n Ei EF nn0 ni exp E F Ei k BT EV p-side n-side W p p 0 ni expEi E F k BT (x) qND k BT p p 0 nn0 N AND + Vbi ln VT ln q n2 n2 -qNA - x i i V (x) (b) Majority- minority carrier Vbi relationship: E (x) x pn0 p p 0 exp Vbi / VT xp xn n p 0 nn0 exp Vbi / VT Emax x EEE 531: Semiconductor Device Theory I – Dragica Vasileska (c) Depletion region width: Solve 1D Poisson equation using depletion charge approximation, subject to the following boundary condi- tions: V ( x p ) 0, V ( xn ) Vbi , E ( xn ) E ( x p ) 0 p-side: V p ( x) qN A 2k s 0 x x p 2 qN D n-side: Vn ( x) xn x 2 Vbi 2k s 0 Use the continuity of the two solutions at x=0, and charge neutrality, to obtain the expression for the depletion region width W: xn x p W V p (0) Vn (0) W 2k s 0 ( N A N D )Vbi qN A N D N A x p N D xn EEE 531: Semiconductor Device Theory I – Dragica Vasileska (d) Maximum electric field: The maximum electric field, which occurs at the metallurgical junction, is given by: dV qN A N DW Emax dx x 0 k s 0 ( N A N D ) (e) Carrier concentration variation: 15 N A N D 1015 cm 3 10 Concentration [cm-3] 13 10 Wcalc 1.23 mm Emax( DC ) 9.36 kV / cm 11 10 -3 n [cm ] -3 Emax( sim ) 8.93 kV / cm 9 p [cm ] 10 7 10 5 10 0 0.5 1 1.5 2 2.5 3 3.5 Distance [mm] EEE 531: Semiconductor Device Theory I – Dragica Vasileska N A N D 1015 cm 3 Wcalc 1.23 mm, Emax( DC ) 9.36 kV / cm, Emax( sim ) 8.93 kV / cm 15 10 0 Electric field [kV/cm] 14 -2 (x)/q [cm ] 5x10 -3 -4 0 -6 14 -5x10 -8 15 -10 -10 0 0.5 1 1.5 2 2.5 3 3.5 0 0.5 1 1.5 2 2.5 3 3.5 Distance [mm] Distance [mm] EEE 531: Semiconductor Device Theory I – Dragica Vasileska N A 1016 cm3 , N D 1018 cm3 Wcalc 0.328 mm, Emax( DC ) 49.53 kV / cm, Emax( sim ) 67 kV / cm 17 10 10 Electric field [kV/cm] 0 16 5x10 -10 (x)/q [cm ] -3 -20 0 -30 -40 16 -5x10 -50 -60 17 -10 -70 0.6 0.8 1 1.2 1.4 0.6 0.8 1 1.2 1.4 Distance [mm] Distance [mm] EEE 531: Semiconductor Device Theory I – Dragica Vasileska (f) Depletion layer capacitance: Consider a p+n, or one-sided junction, for which: 2k s 0 Vbi V W qN D The depletion layer capacitance is calculated using: dQc qN D dW qN D k s 0 1 2(Vbi V ) C 2 dV dV 2(Vbi V ) C qN D k s 0 1 C2 Measurement setup: 1 slope ND W dW Reverse bias Forward bias vac ~ V V Vbi V EEE 531: Semiconductor Device Theory I – Dragica Vasileska (B) Equilibrium analysis of linearly-graded junction: 12 k s 0 Vbi V 1/ 3 (a) Depletion layer width: W qa qaW 2 (c) Maximum electric field: Emax 8k s 0 1/ 3 qaks 0 2 2 (d) Depletion layer capacitance: C 12Vbi V Based on accurate numerical simulations, the depletion layer capacitance can be more accurately calculated if Vbi is replaced by the gradient voltage Vg: 2 a 2 k s 0VT Vg VT ln 3 3 8qni EEE 531: Semiconductor Device Theory I – Dragica Vasileska (2) Ideal Current-Voltage Characteristics: Assumptions: • Abrupt depletion layer approximation • Low-level injection injected minority carrier density much smaller than the majority carrier density • No generation-recombination within the space-charge region (SCR) (a) Depletion layer: W EC qV np ni2 exp V / VT E Fp E Fn n p ( x p ) n p 0 exp V / VT EV pn ( xn ) pn 0 exp V / VT xp xn EEE 531: Semiconductor Device Theory I – Dragica Vasileska (b) Quasi-neutral regions: • Using minority carrier continuity equations, one arrives at the following expressions for the excess hole and electron densities in the quasi-neutral regions: V / VT ( x xn ) / L p pn ( x ) pn 0 ( e 1)e V / VT ( x x p ) / Ln n p ( x ) n p 0 ( e 1)e n p (x ) pn (x ) Space-charge Forward bias region W pn 0 n p0 x xp xn Reverse bias EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Corresponding minority-carriers diffusion current densities are: diff qD p pn 0 V / VT ( x xn ) / L p Jp ( x) (e 1)e Lp diff qDn n p 0 V / VT ( x x p ) / Ln Jn ( x) (e 1)e Ln Shockley model diff diff J tot J p ( xn ) J n ( x p ) diff drift diff majority J p Jp drift majority J n J n J tot diff diff minority J n minority J p x xp xn No SCR generation/recombination EEE 531: Semiconductor Device Theory I – Dragica Vasileska (c) Total current density: • Total current equals the sum of the minority carrier diffu- sion currents defined at the edges of the SCR: I diff diff I tot I p ( xn ) I n ( x p ) Ge Si GaAs D p pn 0 Dn n p 0 V / V qA L Ln e T 1 p V • Reverse saturation current IS: D p pn 0 Dn n p 0 2 Dp Dn I s qA qAni L Ln L N Ln N A p p D EEE 531: Semiconductor Device Theory I – Dragica Vasileska (d) Origin of the current flow: Forward bias: Reverse bias: W EC EC Ln qV qVbi V qVbi V qV E Fp E Fn EV E Fp E Fn EV Lp W Reverse saturation current is due to minority carriers being collected over a distance on the order of the diffusion length. EEE 531: Semiconductor Device Theory I – Dragica Vasileska (e) Majority carriers current: • Consider a forward-biased diode under low-level injection conditions: Quasi-neutrality requires: nn (x ) nn 0 nn ( x ) pn ( x ) This leads to: pn (x ) diff Dn diff pn 0 Jn ( x) J p ( x) xn x Dp • Total hole current in the quasi-neutral regions: tot diff drift diff J p ( x) Jp ( x) J p ( x) Jp ( x) EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Electron drift current in the quasi-neutral region: Dn diff 1 diff Jn ( x ) J tot 1 J p ( x ), E ( x ) diff J n ( x) D qn( x )m n p drift J n (x ) J tot tot diff drift J n ( x) J n ( x) J n ( x) diff diff J n ( x) J p ( x) diff J p (x ) x diff J n (x ) EEE 531: Semiconductor Device Theory I – Dragica Vasileska (f) Limitations of the Shockley model: • The simplified Shockley model accurately describes IV- characteristics of Ge diodes at low current densities. • For Si and Ge diodes, one needs to take into account several important non-ideal effects, such as: Generation and recombination of carriers within the depletion region. Series resistance effects due to voltage drop in the quasi-neutral regions. Junction breakdown at large reverse biases due to tun- neling and impact ionization effects. EEE 531: Semiconductor Device Theory I – Dragica Vasileska 3. Non-Idealities in PN-junctions: (A) Generation and Recombination Currents J scr Continuity equation for holes: p 1 J p Gp Rp t q x Steady-state and no light genera- tion process: p t 0 , G p 0 • Space-charge region recombination current: xn xn dJ p ( x ) J p ( xn ) J p ( x p ) q R p dx xp xp xn J scr q R p dx xp EEE 531: Semiconductor Device Theory I – Dragica Vasileska Reverse-bias conditions: • Concentrations n and p are negligible in the depletion region: ni2 ni Et Ei Ei Et R k T n exp k T , g p exp p n1 n p1 g B B Generation lifetime • Space-charge region current is actually generation current: qniW qniW J scr J gen J gen Vbi V g g • Total reverse-saturation current: J Js e V / VT 1 J scr J s J gen V VT EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Generation current dominates when ni is small, which is always the case for Si and GaAs diodes. I (log-scale) EC E Fp AJ s V (log-scale) EV E Fn AJ gen W IV-characteristics Generated carriers are swept away from the under reverse bias conditions depletion region. EEE 531: Semiconductor Device Theory I – Dragica Vasileska Forward-bias conditions: • Concentrations n and p are large in the depletion region: np 2 V / VT ni e R 2 V /V ni e T 1 p n n1 n p p1 • Condition for maximum recombination rate: n p ni e V / 2VT Recombination lifetime V /V ni2 e T ni V / 2VT Rmax e , rec p n n p p n rec • Estimate of the recombination current: max qniW V / 2VT J scr e rec EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Exact expression for the recombination current: qni V / 2VT 1 qN D 2Vbin V J scr e , VT , Enp rec 2 Enp k s 0 • Corrections to the model: qni V / mrVT J scr e rec • Total forward current: J Js e V / VT 1 qni V / mrVT rec e J s,eff e V / VT 1 ideality factor. Deviations of from unity represent an important measure for the recombination current. EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Importance of recombination effects: Low voltages, small ni recombination current dominates Large voltages diffusion current dominates log(I) AJ scr AJ V AJ d EEE 531: Semiconductor Device Theory I – Dragica Vasileska (B) Breakdown Mechanisms • Junction breakdown can be due to: tunneling breakdown avalanche breakdown • One can determine which mechanism is responsible for the breakdown based on the value of the breakdown voltage VBD : VBD < 4Eg/q tunneling breakdown VBD > 6Eg/q avalanche breakdown 4Eg/q < VBD < 6Eg/q both tunneling and avalanche mechanisms are responsible EEE 531: Semiconductor Device Theory I – Dragica Vasileska Tunneling breakdown: • Tunneling breakdown occurs in heavily-doped pn- junctions in which the depletion region width W is about 10 nm. Zero-bias band diagram: Forward-bias band diagram: EFn EF EFp EC EC EV EV W W EEE 531: Semiconductor Device Theory I – Dragica Vasileska Reverse-bias band diagram: • Tunneling current (obtained by using WKB approximation): * 3 4 2 m* E 3 / 2 exp 2m q FcrVA g It 2 2 1/ 2 4 E g 3qFcr EF Fcr average electric field in p the junction EFn EC • The critical voltage for tunneling breakdown, VBR, is estimated from: EV I t (VBR ) 10 I S • With T, Eg and It . EEE 531: Semiconductor Device Theory I – Dragica Vasileska Avalanche breakdown: • Most important mechanism in junction breakdown, i.e. it imposes an upper limit on the reverse bias for most diodes. • Impact ionization is characterized by ionization rates an and ap, defined as probabilities for impact ionization per unit length, i.e. how many electron-hole pairs have been generated per particle per unit length: Ei qlF ai exp cr - Ei critical energy for impact ionization to occur - Fcr critical electric field - l mean-free path for carriers EEE 531: Semiconductor Device Theory I – Dragica Vasileska Avalanche mechanism: EF p EFn EC EV Generation of the excess electron-hole pairs is due to impact ionization. Expanded view of the depletion region EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Description of the avalanche process: dJ n dJ p 0, 0 Jn J n a n J n dx dx dx dx dJ n dJ p J p an J n dx Jp - dx dx Impact ionization initiated by electrons. J J n J p const. Jn J n a p J p dx Multiplication factors for dx electrons and holes: J p a p J p dx Jp J n (W ) J p (0) Mn , Mp J n (0) J p (W ) Impact ionization initiated by holes. EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Breakdown voltage voltage for which the multiplication rates Mn and Mp become infinite. For this purpose, one needs to express Mn and Mp in terms of an and ap: an a p dx' x W dJ n 1 1 an e 0 dx an J n a p J p M dx dJ n 0 an a p dx' x p an J n a p J p 1 W dx 1 a pe 0 dx Mp 0 The breakdown condition does not depend on which type of carrier initiated the process. EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Limiting cases: (a) an=ap (semiconductor with equal ionization rates): 1 W 1 1 M a n dx M n W n 0 1 a n dx 0 W 1 1 1 a p dx M p W Mp 0 1 a p dx 0 (b) an>>ap (impact ionization dominated by one carrier): W an dx W Mn e 0 1 an dx 0 EEE 531: Semiconductor Device Theory I – Dragica Vasileska Breakdown voltages: (a) Step p+n-junction • For one sided junction we can make the following approximation: W Wn W p Wn n • Voltage drop across the depletion p region on the n-side: 1 1 Vn FmaxWn VBD FmaxW Wp Wn 2 2 • Maximum electric field: F (x ) qN DW k s 0 2 Fmax Fmax VBD Fmax k s 0 2qN D • Empirical expression for the breakdown voltage VBD: 3/ 2 x Eg ND kV VBD 1.1 60 16 10 cm EEE 531: Semiconductor Device Theory I – Dragica Vasileska (b) Step p+-n-n+ junction • Extension of the n-layer large: 1 n VBD FmaxWm p n 2 • Extension of the n-layer small: Wp VP FmaxWm F1 Wm W1 W1 Wm 1 1 F (x ) 2 2 Fmax • Final expression for the punch- through voltage VP: F1 W1 W1 VP VBD 2 W Wm x m EEE 531: Semiconductor Device Theory I – Dragica Vasileska (4) AC-Analysis and Diode Switching (a) Diffusion capacitance and small-signal equivalent circuit • This is capacitance related to the change of the minority carriers. It is important (even becomes dominant) under forward bias conditions. • The diffusion capacitance is obtained from the device impedance, and using the continuity equation for minority carriers: dp 2 d p p n Dp n n dt dx 2 p • Applied voltages, currents and solution for pn: V (t ) V0 V1eit , V1 V0 it it pn ( x, t ) pns ( x ) pn1 ( x )e J (t ) J 0 J1e , J1 J 0 EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Equation for pn1(x): d 2 pn1 1 i p d 2 pn1 pn1 ( x ) pn1 ( x ) 0 2 0 dx 2 Dp p dx 2 L p' • Boundary conditions: pn (, t ) pn 0 pn1 () 0 V0 V1eit pn (0, t ) pn 0 exp p (0) pn 0V1 exp V0 n1 V VT VT T • Final expression for pn1(x): pn 0V1 V0 x pn1 ( x, t ) exp exp V VT T L p' EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Small-signal hole current: dpn1 AqD p pn 0V1 V0 I1 AqD p 1 i p exp YV1 V dx x 0 L pVT T • Low-frequency limit for the admittance Y: V0 1 exp 1 i p Gd iCdif AqD p pn 0 Y L pVT VT 2 AqD p pn 0 V0 I s eV0 / VT I dI Gd exp , I Forward current L pVT VT VT VT dV 1 AqD p pn 0 V0 1 I Cdif p exp p 2 L pVT VT 2 VT • RC-constant: p The characteristic time constant is on Rd Cdif the order of the minority carriers lifetime. 2 EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Equivalent circuit model for forward bias: Cdepl Rs Ls Cdif 1 Rd Gd • Bias dependence: C Cdif Cdepl Va EEE 531: Semiconductor Device Theory I – Dragica Vasileska (b) Diode switching • For switching applications, the transition from forward bias to reverse bias must be nearly abrupt and the transit time short. • Diode turn-on and turn-off characteristics can be obtained from the solution of the continuity equations: d p n 1 1D 1 J p pn J p R p dt q q x p dQ p Qp dQ p Q p I p (t ) I (t ) I p (t ) dt p dt p Qp(t) = excess hole charge Valid for p+n diode EEE 531: Semiconductor Device Theory I – Dragica Vasileska Diode turn-on: • For t<0, the switch is open, and p+ n the excess hole charge is: Q p (t 0) Q p (0 ) 0 t=0 • At t=0, the switch closes, and we have the following boundary IF condition: Q p (0 ) Q p (0 ) 0 • Final expression for the excess hole charge: t / p 1 e t / p Q p (t ) A Be pIF EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Graphical representation: Q p (t ) pn ( x , t ) Slope almost constant pIF t increasing pn 0 t x • Steady state value for the bias across the diode: pn ( x ) pn 0 e Va / VT 1 e x / Lp Q p Aqpn 0 L p e Va / VT 1 IF Va VT ln 1 IS EEE 531: Semiconductor Device Theory I – Dragica Vasileska Diode turn-off: • For t<0, the switch is in position p+ n 1, and a steady-state situation is established: t=0 VF IF 1 2 R VF VR • At t=0, the switch is moved to R R position 2, and up until time t=t1 we have: pn (0, t ) pn 0 Va 0 • The current through the diode until time t1 is: VR IR R EEE 531: Semiconductor Device Theory I – Dragica Vasileska • To solve exactly this problem and find diode switching time, is a rather difficult task. To simplify the problem, we make the crucial assumption that IR remains constant even beyond t1. • The differential equation to be solved and the initial condition are, thus, of the form: dQ p Qp IR , Q p (0 ) Q p (0 ) p I F dt p • This gives the following final solution: t / p Q p (t ) p I R p I F I R e • Diode switching time: IF Q p (trr ) 0 trr p ln1 IR EEE 531: Semiconductor Device Theory I – Dragica Vasileska • Graphical representation: Va (t ) pn ( x , t ) t Slope almost constant t=0 VR pn 0 t=ts IF ttrr x ts trr t 0.1I R ts switching time trr reverse recovery time IR EEE 531: Semiconductor Device Theory I – Dragica Vasileska