Short Range Digital Wireless Transmitter

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					Short Range Digital Wireless Transmitter:

          Short Range Digital Wireless

           Project in Electronic Design performed by,
                 1) Mukund G. Saiprasad (3533)
                    2) Vinayak Nagpal (3534)
                   3) Anoop K. Deoras (3559)

      The Deptt. Of Electronics and Telecommunications
                 Govt. College of Engg. Pune

                             PROJECT GUIDE
                             Prof. S.P. Mahajan

Short Range Digital Wireless Transmitter:


      We are deeply indebted to Prof. S.P. Mahajan of the
Department of Electronics and Telecommunication, GCOEP, who
guided this project with his prudent advice, enduring interest, ever
needed help and painstaking efforts to make Electronic Design the
most interesting subject of our engineering course. We also thank
the HOD Prof. V.K. Kokate and the staff of the Department of
E&TC for the various facilities provided to us for this project.
      We wish to express our sincerest thanks to              Prof.
M.R. Sankararaman of the National Centre for Radio Astrophysics –
Tata Institute of Fundamental Research, Pune for providing key
insights into the concept and design of this project, without whose
support we could have never ventured into the intriguing field of
UHF wireless design at the TE level. We are also deeply indebted to
Prof. S. Ananthkrishnan, Observatory Director, Giant Meter wave
Radio Telescope, Khodad, for allowing us to work at the GMRT site
and make use of the various design and testing facilities. We also
wish to thank Prof. T.L. Venkat and Mr. Srinivas of NCRA-TIFR
for their timely guidance and finally Mr. Sudhir also of NCRA-
TIFR for doing the SMD soldering.
      We would also like to thank Mr. Simon Yu and Mr. Kevin Hui
of Precision Devices Ltd. and PDL for providing the 13.56MHz
crystal samples used in the circuit and Infineon Technologies for
providing samples of the TDA5100 chip.

Mukund G.S.
Vinayak N.
Anoop Deoras

Short Range Digital Wireless Transmitter:

1.0 Introduction:
This project is intended to comprise the transmitter section of a wireless
digital communication link using the assigned Short Range Devices (SRD)
band at 434 MHz. The system can use either ASK or FSK modulation scheme
and is a straight forward application of the dedicated ASK/FSK transmitter IC
TDA5100 by Infineon Technologies which offers a high level of integration
and requires only a few external components. The transmitter operates at a
very low supply voltage and draws just a few mA of current, making it ideally
suited for use in battery operated systems. The thin-shrink SMD package of
the IC, SMD packaging of all other components and the printed loop antenna,
all contribute to the extremely compact size of the circuit board (4cm x 4cm).
The matching FSK/ASK receiver IC TDA5101 by Infineon which integrates a
very high gain Low Noise Amplifier (LNA), a PLL synthesizer, FSK/ASK
demodulator and data filter, complements this project to complete a Tx-Rx set
which can find wide applications in,
    a) low bit rate short range wireless communication systems
    b) remote control systems
    c) alarm systems
The receiver section has not been implemented as a part of this project on
account of unprecedented delays in procurement of the TDA5101 chip.
Performance Specifications:
    1) Operating Frequency: fC = 433.88Mhz (Center Frequency)
    2) Maximum Bandwidth: 80 KHz.
    3) Output Power: +4dBm.
    4) (ERP)Effective Radiated Power ≈ -30dBm
    (Experimental, at VCC=2.3V).
    5) Modulation Technique: FSK/ASK.
    6) Designed FSK Frequency Deviation: ∆ = + 20 kHz.
      (fH = fC + ∆; fL = fC - ∆).
    7) Maximum Data Transmission Rate: 19.2kbps (19.2k baud).
    8) Voltage Supply Range: 2.1-4V.
    9) Supply Current: 6.9mA (typical).
    10)       Antenna: Printed 0.1λ Loop Antenna (7cm circumference).

Short Range Digital Wireless Transmitter:

1.1 FSK and ASK Modulation Techniques:
Amplitude Shift Keying, (ASK) and Frequency Shift Keying (FSK) are the
simplest of digital continuous wave modulation techniques both in terms of
system realization and mathematical representation. ASK also known as OOK
i.e. On-Off-Keying which simply implies switching a carrier A cosωCt on and
off by the data bit stream. Mathematically it can be represented as the
multiplication of the carrier with a signal y (t) which is the input bit stream in
unipolar format.
               SASK (t) = (AcosωCt)*y (t)
The spectral content of an ASK modulated signal is simply the NRZ spectrum
but frequency translated to have its central lobe at the carrier frequency. The
bandwidth of an ASK signal is thus 2fB where fB is the bandwidth of the data
i.e. the bit rate.

Short Range Digital Wireless Transmitter:

FSK or Frequency Shift Keying on the other hand can be seen as the
combination of two ASK schemes. In FSK the carrier is switched between
two frequencies fH and fL by the input data stream. Mathematically FSK signal
can be represented as
        SFSK (t) = (Acos (ωC + y (t)*∆) t)
Where y(t) is the digital data in bipolar form, so when incoming bit is HIGH,
y(t) is +1 and transmitted frequency is fH=fC+∆, (fC is center frequency) and
when incoming bit is LOW, y(t) is -1 and transmitted frequency is fL=fC–∆.
The FSK signal may or may not be phase continuous depending upon the
choice of fC, ∆ and the transmission bit-rate fB. If both fH and fL are integral
multiples of the bit-rate fB, then in each bit interval each of the two sine waves
(for fH and fL) will complete integral number of cycles and the overall signal
will have phase continuity. Non-Continuous Phase FSK has a wider
bandwidth requirement because of introduction of high frequency components
caused by phase discontinuities.

Short Range Digital Wireless Transmitter:

   Short Range Digital Wireless Transmitter:

    In the frequency domain, Continuous Phase FSK can be seen as the addition
of two ASK spectra, one with carrier at fH and the other at fL. The spectrum has
two distinct lobes (sinc pulses) separated by a sharp minimum. Successful
demodulation of the FSK signal depends on two factors.
              a) Frequency separation between the two lobes i.e. df.
              b) Dip in transmitted power between the two lobes.

   To transmit data at a bit-rate of fB bits/sec, the separation between fH and fL
   should be at least 2fB to avoid overlapping of the two lobes, thus minimum
   separation between fH and fL is 2fB, it also follows that the bandwidth required
   is 4fB. At the same time the receiver should be sensitive enough to distinguish
   among the fH lobe and the fL lobe, for this the required sensitivity of the
   receiver will be a function of Pmax/Pmin so minimum power should be
   transmitted between the two lobes for maximum dip and ease of
    The following figures show spectra of
           a) A FSK system which does not satisfy the condition of fH – fL < 2fB.
           b) A FSK system which satisfies above condition but is poorly
              designed and will require a high sensitivity receiver as power
              between the two lobes is considerable.

Short Range Digital Wireless Transmitter:

Short Range Digital Wireless Transmitter:

2.0 Design

2.1 Selection of fH and fL for FSK modulation
    1) The device TDA5100 performs FSK modulation by switching a
       capacitor across the crystal in a crystal oscillator and the deviation in
       the crystal load capacitance produces required deviation in the output
       frequency. The maximum deviation that can be achieved using this
       device is approx 50 kHz.
    2) For Continuous Phase FSK, fH and fL must be integral multiples of fB.
    3) The transmitter is to be designed for standard serial transmission baud
       rate of 19.2 kb/sec. Thus fB = 19.2 kHz, and for no overlapping between
       fH – fL > 2* fB
       fH – fL > 2*19.2 kHz
       fH – fL > 38.4 kHz
    4) For better discrimination at receiver the power between the two lobes
       should be minimum.
    5) fH and fL should both lie in the band allowed by the transmitter IC i.e.
       433.8 MHz to 434.0 MHz.
Selection: The variation in the transmitted spectrum with increasing (fH – fL )
is shown by the following plot.

Short Range Digital Wireless Transmitter:

For phase continuity let us find an integer multiple of 19.2 kHz which is
closest to 433.85 MHz.
433.85MHz/19.2KHz =22596.35
Let us choose NL = 22597, thus fL = 22597 * 19.2 kHz = 433.8624 MHz.
Now fH should be approximately 40 kHz more than fL and should also be an
integral multiple of 19.2 kHz.
433.8624 MHz + 40 kHz = 433.9024 MHz
433.9024MHz/19.2kHz = 22599.0833
Let us choose NH = 22599, thus fH = 22599 * 19.2 kHz = 433.9008 MHz.
Selected fH = 433.9008MHz, fL = 433.8624MHz.

2.2 Hardware Implementation using ICTDA5100
Functional Description of ICTDA5100:
The TDA 5100 has been implemented in a 25GHz silicon bipolar process. It
supports all low power device (LPD) wireless applications with data rates of
up to 100kb/s using ASK and up to 40kb/s using FSK digital modulation. The
basic configuration is a PLL frequency synthesizer circuit with an on chip
fully integrated VCO operating at a frequency in the 869MHz range. This
frequency is divided by 64 for operation at a reference frequency of 13.5MHz
or by 128 at a reference frequency of 6.8MHz. The power amplifier is driven
by the VCO with an isolation driver stage for operation at 869MHz. Operation
at 434MHz is achieved by first dividing the VCO frequency by two. The
power amplifier is a class C configuration. It has been optimized for high
power efficiency. Modulation is achieved by either modulating the frequency
of the reference oscillator in FSK applications or by modulating the carrier
amplitude using a digital output power control pin in ASK applications.

                                        - 10 -
Short Range Digital Wireless Transmitter:

Functional Block Diagram:

                                        - 11 -
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Functional Blocks
1. PLL Synthesizer
The Phase Locked Loop synthesizer consists of a voltage controlled oscillator
(VCO), an asynchronous divider chain, a phase detector, a charge pump and a
loop filter and is fully implemented on chip. The tuning circuit of the VCO
consisting of spiral inductors and varactor diodes is on chip, too. Therefore no
additional external components are necessary. The nominal centre frequency
of the VCO is 869 MHz. The oscillator signal is fed both to the synthesizer
divider chain and to the power amplifier. The overall division ratio of the
asynchronous divider chain is 128 in case of a 6.78 MHz crystal or 64 in case
of a 13.56 MHz crystal and can be selected via pin 16 (CSEL). The phase
detector is a Typ IV PD with charge pump. The passive loop filter is realized
on chip.3-
                    CSEL               Crystal Frequency
                    Open               13.56 MHz
                    Shorted to ground 6.78 MHz

2. Crystal Oscillator
The crystal oscillator operates either at 6.78 MHz or 13.56 MHz. In case of
FSK transmission the oscillator frequency can be detuned by a fixed amount
determined by an external capacitor via pin 7 (FSKDTA). For both quartz
frequency options 847.5 kHz or 3.39 MHz are available as a clock frequency
output (CLKOUT) to drive the clock input of a micro controller. The dividing
ratio is controlled by the CLKDIV pin.
ab 3-4

 Crystal               CLKDIV                          Dividing Ratio
 6.78 MHz              Shorted to ground               2
 13.56 MHz             Shorted to ground               4
 6.78 MHz              Open                            8
 13.56 MHz             Open                            16

                    FSKDTA                  FSKOUT Switch

                    Open                    OFF

                    Shorted to ground ON

       Table 3-5
                                        - 12 -
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3. Power Amplifier
In case of operation in the 868-870 MHz band the power amplifier is fed
directly from the voltage controlled oscillator. In case of operation in the 433-
435 MHz band the VCO frequency is divided by 2. This is controlled by the
FSEL pin as described in the table below. In FSK transmission the power
amplifier can be switched on with pin 6 (ASKDTA). In case of ASK
transmission the same pin is used as the data input. The PAOUT pin is an
open collector output and requires an external pull up coil to provide bias. The
coils part of the tuning and matching LC circuit to get best performance with
the external loop antenna. To achieve the best power amplifier efficiency the
high frequency voltage swing at the PAOUT pin should be two times the
supply voltage. The power amplifier has its own ground pin (PAGND) in
order to reduce the amount of coupling to the other circuits. Table
               FSEL                Radiated Frequency Band
               Open                 869 MHz
               Shorted to ground 433 MHz
4. Low Power Detect
The supply voltage is sensed by a low power detector. If the supply voltage
drops below 2.15 V the power amplifier can be turned off via pin 6. To
minimize the external component count, an internal pull-up current of 40µA
gives the output a high state at supply voltages above 2.15V.

5. PLL Enable Mode
The turn on time of the PLL is determined by the turn on time of the crystal
oscillator and is typically less than 1 msec (dependent on the crystal itself). To
save current consumption and to avoid undesired power radiation during this
time, the power amplifier is turned off. The current consumption at this mode
is typically 3.5 mA. To have the possibility to control the IC via two data lines
from a micro processor, the ASK- and FSK Data inputs are connected via a
logical or” to pull up internally the PDWN input. In this case, it is
recommended to leave the PDWN pin unconnected.

6. Transmit Enable Mode
In the TRANSMIT ENABLE MODE the power amplifier is turned on too,
and the current consumption of the IC is about 7 mA (transforming network at
the PAOUT, see figure 4-1). To get in this state, the ASKDTA input is to
switch to a high level.

                                        - 13 -
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2.3 Pin Configuration:

                                        - 14 -
Short Range Digital Wireless Transmitter:

2.3.1 Pin Definitions and Functions:

Pin 1: PDWN

Disable pin for transmitter circuit. PDWN < 0.7V turns off all transmitter
functions. PDWN > 1.5V gives access to all transmitter functions. PDWN
input will be pulled up by 40µA internally by either setting FSKDTA or
ASKDTA to a logic high state.

Pin 2: LPD

This pin provides an output indicating the low-voltage state of the supply
voltage VS. VS <2.15V will set LPD to the low state. An internal pull up
current of 40µA gives the output an high state at supply voltages above
2.15 V.

                                        - 15 -
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Pin 3: VS
This pin is used to supply DC bias to the transmitter electronics. A RF bypass
capacitor should be connected directly to this pin and returned to ground as
short as possible.

Pin 4: LF

Output of the charge pump and input to the VCO control. An internal loop
filter has been designed for a loop bandwidth of 150 kHz. The loop bandwidth
may be reduced by applying an external RC network.

Pin 5: GND
General ground conection.


Digital amplitude modulation can be imparted to the PA through this pin.
ASKDTA > 1.5V or an open enables the PA. ASKDTA < 0.5V disables the

                                        - 16 -
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Digital frequency modulation can be imparted to the XO by this pin. The
VCO varies in accordance to the frequency of the reference oscillator.
FSKDTA < 0.5V closes the FSKOUT switch at pin 11. A capacitor can be
switched to the XO network this way. The XO frequency will be shifted
giving the designed FSK frequency deviation. FSKDTA > 1.5V or an open
will set the FSKOUT switch to a high impedance state.


Clock output to supply a external device. A external pull up resistor has to be
added in accordance to the driving requirements of the external device. A lock
frequency of 3.39MHz can be selected by a logic low at CLKDIV input, pin9.
Logic high or an open at the CLKDIV input will result in a CLKOUT
frequency of 847.5 kHz.

                                        - 17 -
Short Range Digital Wireless Transmitter:


This pin is used to select the desired clock division for the CLKOUT signal. A
logic low CLKDIV < 0.5V selects the 3,39MHz output signal at pin8. A logic
high CLKDIV > 1.5V or an open selects the 847.5 kHz output signal.

Pin 10: COSC

This pin is connected to the reference oscillator circuit. The reference
oscillator configuration is of the negative impedance converter type. It
presents a negative resistor in series to an inductor at the COSC pin.

Pin 11: FSKOUT
This pin is a switch being activated by the FSKDTA signal at pin 7. The
switch is closed for a logic low at the FSKDTA pin. It is open for a logic high
or a open at the FSKDTA input. FSK-OUT will switch an additional capacitor
to the reference crystal network to pull the crystal frequency by an amount

                                        - 18 -
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resulting in the designed FSK frequency shift of the transmitter output

Pin 12: FSKGND

Ground connection for FSK modulation output FSKOUT.

Pin 13: PAGND

Ground connection for the power amplifier (PA). All the RF ground path of
the power amplifier should be concentrated to this pin.
Pin 14: PAOUT

RF output pin for the transmitter. A DC path to VS has to be supplied by the
antenna matching network.

Pin 15: FSEL
This pin is used to select the desired transmitter frequency. FSEL < 0.5V will
give access to the 434MHz frequency range. FSEL > 1.5V or a open will put
the transmitter to the 869MHz mode.

                                        - 19 -
Short Range Digital Wireless Transmitter:

Pin 16: CSEL

A logic low (CSEL < 0.5V) applied to this pin sets the internal frequency
divider for a reference frequency of 6.7MHz. A logic high (CSEL > 1.5V or a
open) will be applied for a reference frequency of 13.5MHz.

                                        - 20 -
Short Range Digital Wireless Transmitter:

2.4 Component Value Calculations for FSK:

FSK modulation is achieved by switching the load capacitance of the crystal
as shown below.

The frequency deviation of the crystal oscillator is multiplied with the divider
factor N of the Phase Locked Loop to the output of the power amplifier. In
case of small frequency deviations (up to +/- 1000ppm), the two desired load
capacitances can be calculated with the formula below.

Because of the inductive part of the TDA5100 this values must be corrected
by formula 1). Therefore Cv± can be calculated.

                                        - 21 -
Short Range Digital Wireless Transmitter:

If the FSK switch is closed, Cv_ is equal to Cv1 (C6 in the application
diagram). If the FSK switch is open, Cv2 (C7 in the application diagram)can
be calculated.

The crystal frequency is 13.56 MHz and the crystal load capacitance is
CL=20pF. The inductance l is specified within the electrical characteristics at
13.5MHz to a value of 11uH.
On performing the suitable calculations for the 434MHz band, we get the
values of C6 and C7 as:
C6 = 8.2 pF
C7 = 22 pF

The circuit diagram is as shown in the figure:

Component values:
C1 = 47 nF
C2 = 8.2 pF
C3 = 4.7 pF
C4 = 100 pF
C5 = 4.7 nF
C6 = 8.2 pF
C7 = 22 pF
L1 = 100 nH
L2 = 0
                                        - 22 -
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RA = 15k
RF = 15k


                                        - 23 -
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2.5 Antenna Design:
The antenna used for the application board is a special loop configuration
design. It utilizes an unusual capacitive loading at the end of the loop. Simula-
tions and tests have proved this antenna to be more efficient and having a
wider bandwidth than a conventional antenna grounded at its end. This effect
is partly caused by radiation of additional electrical field components by the
loop itself. The antenna in this case should not be considered as a mere
magnetic loop but rather as a certain part of a dipole. Placing it apart from the
electronic part on the board forms kind a of dipole antenna. The hot part of the
loop - now primarily at its end - radiates certain electrical field components
which add to the magnetic component. The radiation resistance of a small
loop of area A with a uniform current distribution can be calculated as

                                 RR = 320 П4 A2/λ4

The radiation resistance of our loop antenna comes to about 8.1mΩ.
The output of the power amplifier is an open collector output. The
circumference of the loop antenna has been kept slightly less than 0.1λ.
The capacitors used in the antenna circuitry are for matching and suppressing
the harmonics.

2.6 Theory of Quartz Crystals

                                        - 24 -
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2.6.1 Crystal Manufacture:
Quartz crystals are used in a multitude of electronic circuits from
microprocessor clocks to sophisticated telecommunication systems. The
majority of quartz crystals manufactured today are of the AT-cut type where a
quartz blank is cut from a quartz crystal bar at approximately 35° 15' with
reference to the optical axis of the bar. The angle of cut is by far the largest
single factor which determines the frequency/temperature stability of the
finished crystal. By making a small change in the cutting angle, and then via
precise measurement and grouping of the blanks using X-ray diffraction, very
tight frequency/temperature stabilities may be obtained. However, it has only
been in relatively recent times, that the reliable grouping of crystal blanks into
15'' pockets (i.e.¼ of one minute of an arc) has become possible. Without this
sort of accuracy of measurement it was difficult to manufacture tight
temperature stability crystals such as ±3.0 ppm over -10 to +60°C with any
sort of consistency.
In addition to ensuring the blank has the correct angle it must also be of the
correct thickness. The frequency of the blank is determined by its thickness
(the thinner the blank the higher the frequency) and the amount of metal
                                        - 25 -
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(usually silver) applied to the blank to make up the electrode. To produce a
high quality crystal, the blank must have a fine surface finish which is both
flat and parallel. Blanks are therefore supplied thicker than necessary to allow
the manufacturer to remove quartz in a lapping machine using appropriate
abrasives and then to further improve the finish by chemically etching . In
many instances a further lapping process known as polishing is carried out,
again using a lapping machine, but this time with much finer abrasives, giving
an even better surface finish. After sufficient quartz has been removed to give
the required surface finish the blank frequency will be approximately 10,000
ppm above final frequency. Resonators of
any type require an electrode. The most widely used method of forming an
electrode onto a quartz blank is by depositing metal on to it by sputtering or
evaporating under vacuum in a baseplating machine. The addition of the metal
on the blank has a loading effect and hence the blank frequency falls. After
baseplating the frequency of the crystal will be approximately 1,000 ppm
above final frequency.
The electrode diameter and thickness determine the motional capacitance (C1
), inductance (L1 ), static capacitance (C0 ) and the effective series resistance
(R1 ) of a crystal. Each of these parameters are interrelated (see fig).

Their values largely determine the quality factor (Q), trimming sensitivity (Ts
) and to a lesser extent the spurious modes of the crystal. It is very important
that these parameters are considered when specifying a crystal if it is to
perform correctly in circuit. Without specifying these factors there is a
possibility of repeatability problems occurring when ordering from different
manufacturers, or for that matter, batch to batch repeatability problems when
ordering from a distributor rather than a manufacturer.
After the completion of the baseplating process the crystal must be mounted
onto a base. Silver loaded epoxy is used to cement the tails of the electrode to
the spring or slot mounts of the base. The crystal is then placed in an
evaporate to frequency unit (ETFU) which evaporates a small amount of
additional silver onto the electrode until the crystal frequency is within
specified limits. Commonly ±10 ppm of the required nominal frequency at
+25°C is specified for final calibration limits. The crystal is then sealed,
usually using resistance weld techniques, after which it can then be aged and
                                        - 26 -
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tested. The above outlines the very basic processes involved in quartz crystal
manufacture. There are also many other stages allied to these when producing
crystals over a wide range of frequencies, overtones and holder styles. Control
of cleanliness is also paramount throughout the final stages of manufacture if
low ageing is to be maintained.

2.7 Surface Mount Devices
Surface Mount Devices(SMDs) are high performance miniature components
that are directly soldered on to the lands(pads) of the PCB. SMDs are
available in both leaded and lead less versions. A majority of normal through
hole components are available in SMD version covering integrated circuits,
discrete semiconductors, resistors, multilayer ceramic capacitors, electrolytic
capacitors, plastic film capacitors, tantalum capacitors, inductors, presets,
trimpots, fuses, etc. Though most of the conventional through hole
components are available in SMD form, there are, however, many that have
yet to be developed to SMD size. In such cases it is possible to use a mix of
SMDs and through hole components on the same PCB. SMDs are suited to
almost every application. They have proved to be better than conventional
components in terms of ruggedness, reliability and size. SMDs are packed in
tape and reel, tubes, trays, or bulk for convenience of feeding automatic
placement machines.
Surface Mount resistors are manufactured in many standard sizes. Our trainer
kits use the common sizes that teach the beginner to handle them comfortably.
The size code describes the dimensions of the resistor. A 1206 resistor is 0.12
inch long and 0.06 inch wide.
Surface Mount resistors are marked with a three digit code for ± 5% tolerance
devices and a four digit code for ± 1% or ± 2% devices. In the case of three
digit codes the first two digits specify the first two digits of the resistance and
the third digit is a multiplier (number of zeroes). In the case of four digit codes
the first three digits specify the first three digits of the resistance and the
fourth digit is a multiplier (number of zeroes). The figure arrived at is the
resistance in Ohms. Resistors of less than 10W are marked with an R in place
of the decimal point e.g. 6.8W is marked 6R8.
A commonly used devices in Surface Mount circuits is the 0W jumper which
is identical, in shape and size, to the usual Surface Mount resistor. This device
is marked 000 and has no resistance. It is used to bridge one track over
another on the PCB.

                                        - 27 -
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Multilayer ceramic chip capacitors are used in most applications. They come
in similar sizes as chip resistors and the the common sizes have been selected
again in our trainer kits for reasons already explained. They are usually
unmarked so special care must be taken while handling . The standard values
are from 0.47pF to 2.2mF in a range of 16 to 50 volts.Tantalum chip
capacitors are produced in a range of values and voltages. A typical tantalum
with a capacitance of 10m F and voltage 16 measures about 5.8mm by 4.5mm.
It is enclosed in a plastic package with terminals at each end. The package is
directly marked with the capacitance and voltage; polarity is indicated by a
band at the positive end.
SMT has many important applications in the field of radio communication
that has led to the availability of a wide variety of inductors. Their package
construction is similar to that of the tantalum chip capacitors.
The most popular package used for transistors, diodes, zeners, and LEDs is
the SOT23. The pinout for transistors is generally standard for all
manufacturers with very rare exceptions. Pinouts for diodes vary, as many
packages contain two diodes, connected either in common-anode or common-
cathode mode or as two separate diodes. With a single diode, terminal 2 is
usually the anode and terminal 3 is the cathode, with no connection to
terminal 1.
Variable cermet resistors are available in the usual range of values. Their size
is about 3 to 4mm square.
Operational amplifiers, comparators, audio amplifiers, timers, CMOS logic,
74HC logic, RAMs, optocouplers, voltage references, voltage regulators, etc.,
are available in SMD form. All these ICs are usually given their original type
numbers with a suffix, most often ‘D’, to indicate that they are SMD.
Packages are termed SO (small outline) followed by an indication of the
number of pins. SO14 is a 14-pin IC. SMD ICs have the same specifications
and pin-outs as their through-hole versions. Pin number ‘1’ is indicated either
by a dot or bar. Another indicator is the bevelled top edge of the package
along the pin number ‘1’ side.

                                        - 28 -
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2.7.1 Advantages of SMD’s
The miniature size of the PCB pads and tracks populated by tiny SMDs results
in a reduction of inter-track capacitance. Self-inductance is virtually
eliminated because of the very short leads or total absence of leads. These two
factors are ideal for high frequency circuits especially in the RF range. In
digital circuits propagation delays are reduced and clocking rates become
higher.In SMT the components and tracks are on the same side of the board
making it very easy to trace connections and access test points on assembled
boards. This tremendous advantage will be appreciated when one thinks of the
problematic through hole PCB which one has to keep turning over and over
trying to remember component location on one side and remembering at
which point to test the circuit on the other side.
SMDs generally cost more than through-hole components. The difference,
however, is not great enough to worry hobbyists.
The miniature nature of SMD assemblies is found interesting to hobbyists
who are into miniaturist activities, such as model railways, military modelling,
and doll’s house furnishing. An imaginative hobbyist will find numerous
applications for these tiny circuits. In fact, many through-hole projects can be
converted to SMD by model-makers to add realism to their models. Finally,
there is the pleasure of being up-to-date in one of the latest technologies in an
interesting way.
2.8 Working with SMD’s
Many SMDs do not have any marking to identify them; especially in the case
of chip capacitors. Hence they should not be removed from their sealed and
labelled packets until they are to be soldered. The soldering iron is the item of
equipment to which most attention must be given. The iron needs to be light
and easy to handle and to have a fine bit. A 0.5mm bit is ideal but difficult to
come by. It is, however, possible to solder satisfactorily with a bit up to 2mm
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diameter. To avoid danger of overheating the components, use a low wattage
iron (18W or less). A clean bit is essential, especially when soldering SMDs.
A shallow tray holding a damp sponge is used for wiping the bit clean. The bit
gets a little cool when dipped in the sponge; hence we have to wait a few
moments for the iron to heat the bit again and only then continue soldering.
A pair of fine-tipped bent-end tweezers is a very useful tool for picking and
placing the SMDs on to the surface of the PCB, and to hold them in position
when soldering. The next essential item is a low-power magnifying glass of 3
or 4 inch diameter, with a magnification of about 4 times; with its own stand
to allow your hands to be free. In addition to this, a high-power magnifier will
be very useful to inspect PCBs for possible faults in soldered joints, pads or
tracks. A watchmaker’s eyeglass with 8 to 10 times magnification will be
found adequate. The problem faced during SMD soldering is to hold the SMD
in place

There are a couple of solutions to this...

   •   The SMD should be glued on to the PCB making it easy to solder. Clear
       nail polish, used by ladies on their finger nails, is a very good glue.
       Using a pin put a tiny dot of this nail polish on the PCB between the
       pads and put the component in place. It dries in a few moments holding
       the SMD in place for soldering.


   Use a 15, 18 or 25 watt soldering iron. The lower the wattage the better.

   1. The tip should be a needle point. A copper tip can be filed down to a
      point. Iron plated tips must not be filed.
   2. A new tip should be properly tinned before it is used for the first time.
      To do this, the iron is heated sufficiently and solder wire is applied to
      the tip. The molten solder is then wiped off with a damp sponge. The
      steps are repeated until the tip is uniformly coated with solder.
   3. The tip should be wiped frequently with a damp sponge.
   4. The use of good solder is very important for SMD soldering.
   5. Both, the SMD terminal and the PCB pad, should be uniformly heated
      by the soldering iron. Each joint should completed in 3-4 seconds.
      Excess heat will damage the components.
   6. The solder wire should touch the pad for such time as to melt just the
      right quantity of solder. In the case of SMDs this is very important as
      the pad areas are very small.

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The soldering iron tip should be removed within 3-4 seconds and the joint
allowed to cool without moving the PCB or SMD. This care is necessary to
avoid fine cracks in the soldered joint.

3.0 Printed Cicuit Board Design

3.1 Introduction to PCB:
A printed circuit board is an electronic circuit mounted on an insulating base
material. The conductor patterns are made of copper material. There is a very
thin layer of conducting material coated over the insulating base material.
Functions of a PCB:
   1. It provides the necessary mechanical support for components in circuit.
   2. It provides necessary electrical connections.
   3. Printed inductors and capacitors can be used in the place of usual
       inductors and capacitors in special situations.
Advantages of PCB over Wire Method:
   1. Lower cost.
   2. Small size.
   3. A more uniform product can be produced.
   4. Wiring errors are eliminated.
   5. It reduces assembly and inspection work.
Types of PCB:
Two most important types of PCB are:
   1. Single sided PCB:
This type of PCB consists of a coat of copper on only one side of base
material. This type of PCB is used when manufacturing cost has to be kept
minimum. Single sided PCBs are mostly used in entertainment electronics
where manufacturing cost has to be minimum. To jump over conductor tracks,
components have to be utilized or else jumper wires are used.
   2. Double sided PCB:
Double sided PCB is used when there are more number of jumpers. This type
of PCB has a copper coat on both sides of base material. Double sided PCBs
can be made with or without plated-through holes. The total number of plated-
through holes, especially via-hles ( holes utilized only for through-contact and
not for component mounting), should be kept to the minimum for reasons of
economy and reliability.
There is another important type of PCB called multi layer PCB in which
several layers of PCB are laminated. They are very expensive and used to
reduce the size of a PCB. They are used for complex electronic circuits (
especially digital ) like PCI cards etc..

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Layout Planning:
Layout basically means placing/arranging things in a specific order. This
placement is made such that the interconnection length is optimal. At the same
time, it also aims at providing accessibility to the component for insertion,
testing and repair. The PCB layout is the starting point for final artwork
preparation. For placing the components on the board, all information about
the circuit is needed for artwork preparation. The layout should be prepared
from component side. Layout planning deals with planning the proper
placement of components considering factors like noise, interference,
maximum utilization of space, etc. and input and output connections for a
given circuit.
Layout Scale:
The artwork should be produced at a 1:1, 2:1 or 4:1 scale, depending on the
accuracy required. The artwork scale commonly used is 2:1. We have used a
1:1 scale. A 2:1 artwork is 4 times the actual PCB area. Therefore, the 4:1
scale is used only when very high precision is required.
Layout Methodology:
For proper design, minimal steps to be followed are:

    1. Get the final circuit diagram and component list.
    2. Choose the board type: single-sided or double-sided or multi-layered.
    3. Identify the appropriate scale for layout.
    4. Select suitable grid pattern.
    5. Choose the correct board size keeping in view the constraints.
    6. Select appropriate layout technique, manual or automated.
    7. Document in form of a layout sketch.
3.2 General Rules and Parameters:
In designing a PCB layout one has to minimize the magnitude and influence
of the parasitic effects connected with the realization of interconnections.
Parasitic effects influencing the working of an electronic circuit on a PCB can
be caused by the resistance or inductance of a conductor or the capacitance
between two conductors. The heat generated in the circuit may also alter its
The copper conductor tracks on a PCB have a finite resistivity which
introduces a voltage drop proportional to the current flowing in that particular
conductor. Let us find the resistance of 1 mm wide conductor per cm of
length. Let us assume a standard copper foil of 0.035 mm thickness without
any plating.
R = (ρ x l) / A Ω

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ρ = resistivity [Ω cm x 10-6]
l = conductor length [ cm ]
A = conductor cross-section [cm2]
On substituting the proper values we get R = 0.0049 [Ω]
    1. Capacitance between conductors on opposite sides of the PCB.
Two PCB conductors ( flat conductors ) separated by a dielectric (laminate),
can be considered to form a capacitor. A rough approximation for the
capacitance can be made by using the elementary capacitor formula:
C = (0.886 x εr x A) / b [pF]
A = total overlapping area [cm2]
b = thickness of dielectric [mm]
εr = relative dielectric constant
    2. Capacitance between adajacent conductors.
The quantitative determination of the capacitance between conductors is
rather complicated. Since the capacitive coupling is undesirable in normal
circuits, ways to minimize it have to be found where it could assume critical
values. This can be achieved by observing the following rules:
    (i)    Keep critical conductors narrow and provide sufficient spacing
           between them.
    (ii) If necessary, run a ground line between the critical conductors. The
           broader this ground line, the better the result will be.
    (iii) Where such a ground line has been provided, the two signal
           conductors should run at a very close spacing to it. This is to keep
           the capacitive coupling to ground high while the coupling between
           the signal lines at the same time becomes less.
Inductance of PCB conductors:
When fast signals or high-speed logic has to be realized on a PCB, it is
important to know the inductance of a conductor arrangement. The formula is
pretty complicated and is given as
L = l x 0.00921 x log ((s+w)/(t+w)) + 0.006 - 0.004 x ( m + (s+w)(10 x l))
[µH /cm]
It can be used for single-sided boards with two conductors of the same width.
L = inductance [µH]
l = parallel running conductor length [cm]
s = distance between two adjacent conductors [mm]
t = thickness of the conductors [mm]
w = width of the conductors [mm]
m is a factor which depends on the ratio of ( w/ ( w + s))

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3.3 Rules for layout:
    1. Schematic diagram:
        The schematic diagram forms the main input document for preparation
        of layout, and it should therefore be complete and brought up-to date in
        all respects.
    2. Electrical requirements:
        The PCB designer must be aware of circuit performance and critical
        aspects of the same.
    3. Thermal requirements:
        Heat generating or heat sensitive components should be properly placed
        with respect to each other. Generally, heat-generating components are
        raised to a higher level above the board, which prevents damage to
        components or board itself.
    4. Mechanical design:
        The designer should have information about the physical size of the
        board, type of installation of the board ( vertical/horizontal ), method of
        cooling adopted, front panel operated components etc.
Component Placing Requirements:
Critical components are to be placed first in a configuration that demands only
the minimum for the critical conductors. In a less critical circuit, components
are arranged in the order of signal flow. In circuits where certain components
are common to more connecting points than others, these key points are
placed first and the others are grouped around them like satellites. All
components are placed in such a manner that de-soldering of the components
is possible if they are needed to be replaced.
Component Mounting Requirements:
All components must be placed parallel to one another as far as possible, that
is , in the same direction and orientation. Mechanical over-stressing of the
solder joints is to be avoided. Mark the input, output and power connections at
the appropriate points.

3.4 Design Rules for PCB’s in High Freq Applications:
For very-high frequency circuits ( around 100 MHz and above ) and for very
fast pulses, even short pieces of conductors on a PCB have to be considered as
transmission lines. For longer conductors, if one wants to avoid reflections,
matching of transmission lines becomes a necessity. For shorter conductors,
matching is very often impossible and the conductors will behave either
capacitively or inductively. It is upto the designer to ensure that one obtains a
'capacitive' conductor wherever this will be less harmful, and an 'inductive'
conductor wherever that is preferable. Feedback capacitors (Miller effect) are
especially harmful and should be avoided by using guard lines.
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Printed Capacitors and Printed Inductors:
It is possible to obtain small values of capacitance and inductance directly as a
printed circuit pattern. The advantage is that such printed capacitors have
usually very good high-frequency properties. Thus, printed capacitors have
low (parasitic) series inductance and series resistance and printed inductors
have low (parasitic) series resistance and shunt capacitance. Such printed
capacitors and inductors are ideally suited for decoupling power-supply and
ground lines and for providing small values of compensation series inductance
and compensation shunt capacitance, used to improve the bandwidth of
amplifier stages and the rise-time of pulse circuits.
Ground and Supply Lines:
In fast circuits, the currents drawn from the power supply line and fed back
into the ground do not have constant DC currents; rather they have very high
frequency components, such as current spikes. For the proper functioning of
such circuits, it is necessary to supply such current spikes and still keep the
ground and supply at constant potential. Therefore, power supply lines should
be kept as short as possible just like the signal lines. The following rules
should be followed:
    1. Keep power supply lines and ground lines short.
    2. Solder at least one decoupling capacitor ( value: approximately, 5 to 50
        nF) with good high-frequency properties (with low series inductance)
        on every PCB and between each power supply and ground, so that fast
        current-spikes can be supplied by this capacitor and do not need to be
        drawn from the ( more distant ) power supply itself. As decoupling
        capacitor, a ceramic chip with short leads is ideal. Wound-types of
        paper, polyester and other capacitors are not recommended ( they have
        a large series inductance) and electrolytic capacitors should be
        definitely avoided.
    3. For very-fast and very-high-frequency circuits, it is advisable to have a
        printed circuit capacitor-on the print-in parallel with the ceramic-chip
        decoupling capacitor. The printed circuit capacitor has the most direct,
        i.e., the fastest connection with power supply and ground lines.
    4. It is advisable to have broad power supply lines and ground lines sitting
        very near each other, preferably even sitting just across the printed
        circuit board: i.e., facing each other on both sides of a printed circuit
        board. This will turn the whole length of the power-supply conductor
        on the PCB into a very low impedance line - a low impedance line can
        supply high current spikes without having a large momentary voltage

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   5. The ground line should be the very broadest conductor on the
      PCB(about double as broad as the power-supply lines)- thus the voltage
      spikes will be less on the more critical ground line than on the less
      critical power supply lines. If a lot of copper surface on the PCB is
      connected to the ground line, it becomes electromagnetically very
      difficult to changed the potential of the ground and the ground will
      remain very stable and not exhibit any voltage spikes. Therefore, leave
      the copper in all unutilized parts of the PCB and connect all this copper
      to ground. In many critical high-frequency and fast-pulse applications,
      one even recommends taking a double-sided PCB and connecting one
      side entirely to ground ( as ground plate). Such a ground plate also
      servers as a shield, to reduce electromagnetic interference.
   Recommendations for Design:
          (i)    Use gound plate or other very large ground surface.
          (ii) Use broad power supply lines.
          (iii) Ground and power supply lines should run near each other
                 and be parallel; if possible put added PCB capacitance
                 between them.
          (iv) Provide decoupling capacitor to be soldered on PCB between
                 ground and power supply lines.
          (v) Definitely keep all lines which are not matched very short.
                 You will have rise-time increases of upto 1 nsec/cm of length
          (vi) Decide which parasitic elements C* or L* are more harmful
                 and design conductor layout accordingly.
          (vii) Provide guard-lines in-between (grounded or connected via
                 capacitor to ground) wherever a parasitic capacitance has very
                 dangerous effects ( e.g., feedback capacitance in amplifier
                 stages between input and output).
          (viii) For large-size PCBs (long conductor lengths), and very fast
                 rise-times (or very high upper band-limits), sometimes
                 dielectric losses are important. In this case: use PCBs with
                 suitable high-frequency dielectrics.
          (ix) In other very-fast-pulse cases, skin-effect losses are important:
                 To reduce these, use a ground plate and avoid discontinuities.
          (x) Because of these losses, we should recommend: For very fast
                 pulses, even matched lines have to be kept very short. Rise-
                 times of matched lines increase by 1 to 10 psec/cm or 100 to
                 1000 psec/m due to these losses.

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Serial No.       Component Quantity              Rate (Rs.)   Cost (Rs.)
1.               TDA5100           1             -            Free Sample
                                                              Pvt. Ltd.
2.               13.56 MHz          1            -            Free Sample
                 Surface                                      Courtesy:
                 Mount                                        Precision
                 Crystal                                      Devices Ltd.
3.               Surface            7            1            7
4.               Surface            3            1            3
5.               3 V Battery        1            15           15
6.               Push to on         1            3            3
7.               Film for PCB       1            20           20
8.               PCB                1            30           30
                                                 Total        78

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