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G. Jayakrishna et al. / International Journal of Engineering Science and Technology (IJEST) SEVEN LEVEL CONTROL OF SHUNT ACTIVE POWER FILTER FOR POWER QUALITY ENHANCEMENT G. JAYAKRISHNA Department of EEE, Siddharth Institute of Engineering and Technology, Narayanavanam Road, Puttur, Chittoor(Dist),AndhraPradesh,India-517583 g.jayakrishna25@gmail.com,Cell:91-9849257851. P.SUJATHA Associate Professor, Department of Electrical and Electronics Engineering, J N T U College of Engineering, Anantapur, Andhra Pradesh, India-515002 Email: psujatha1993@gmail.com K.S.R.ANJANEYULU Professor in Electrical & Electronics Engineering, Director, Research & Development Cell, J NTUA, Anantapur, Andhra Pradesh,India-515002 Email: ksralu@yahoo.co.uk Abstract: Shunt Active Power Filter (SAPF) is one of the controllers to enhance power quality (PQ). This paper presents Hybrid Cascaded Seven-Level Inverter (HCSLI) used in SAPF to compensate reactive power, improve the power factor and to suppress the total harmonic distortion (THD) in supply current due to linear load and Non- Linear Diode Rectifier Loads (NLDRLs).In this paper d-q reference frame theory for reference current computation, Constant Switching Frequency Multicarrier Sub-Harmonic Pulse Width Modulation (CSFMSHPWM) technique for controlling the switches of HCSLI, Fuzzy logic controller (FLC) for regulating dc side capacitor voltage are proposed. The results are validated through simulation using Mat Lab/simulink with and without SAPF for linear and nonlinear loads. Keywords: Shunt active power filter, Power quality, Total harmonic distortion, D-q reference frame theory. 1. Introduction The advances in power semiconductor devices have resulted in the development of Active Power Filters (APF) for harmonic suppression. The SAPF based on Voltage Source Inverter (VSI) is an attractive solution to harmonic current problems. The SAPF is connected in parallel with the load. It has the capability to inject harmonic current into the AC system with the same amplitude but in opposite phase to that of the load harmonic current. SAPF, when operated in a current control mode can improve the power quality by mitigating poor load power factor, eliminating harmonic content of load current [Sato et al,(2000),Khoy et al,(2006)]. The principal components of the SAPF are the VSI, a DC energy storage device that in this case is capacitor and the associated control circuits. Shunt compensation for medium and high voltage power systems require higher rating for voltage source inverters (VSIs), but the ratings of the semiconductor devices in VSI are limited. Therefore for higher rated converters, it is desirable to distribute the stress among the number of devices using multilevel topology. Cascaded multilevel configuration of inverter has the advantage of its simplicity and modularity over the configurations of diode-clamped and flying capacitor multilevel inverters. Applications of cascaded multilevel converters for shunt compensation of power systems are described in literature [Peng et al,(1998), Liqiao et al,(2004)]. The performance of an active filter mainly depends on the technique used to compute the reference ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7037 G. Jayakrishna et al. / International Journal of Engineering Science and Technology (IJEST) current to inject the desired compensation current into the line. There are two major approaches that have emerged for the harmonic detection, namely, time domain and the frequency domain methods. The frequency domain methods require large memory, computation power and the results provided during the transient condition may be imprecise. On the other hand, the time domain methods require less calculation and are widely followed for computing the reference current. The two mostly used time domain methods are synchronous reference (d-q-0) theory and instantaneous real-reactive power (p-q) theory. Synchronous reference (d-q-0) theory is followed in this work [Saitou et al,(2003)]. Various types of PWM techniques like constant switching frequency, variable switching frequency multicarrier and phase shifted carrier pulse width modulation methods can be used for multilevel inverter control [Buso et al,(1998), Agelidis et al,(1998)].In this paper constant switching frequency multicarrier sub- harmonic pulse width modulation(CSFMSHPWM) is used to produce control signals for the switches of HCSLI. The dc bus voltage is to be maintained at a constant value otherwise the source current will vary and lapse from sinusoidal waveform. Various types of controllers like Proportional-Integral (PI), Hysteresis, Adaptive, Neuro and Fuzzy Logic Controller (FLC) for dc bus voltage regulation are well presented in literature [Buso et al,(1998), Agelidis et al,(1998)]. The fuzzy logic control rules are not derived from a heuristic knowledge of the system behavior, neither precise mathematical model nor complex computations are needed and is based on human like linguistic terms in the form of IF-THEN rules to capture the non-linear system dynamics [Carrara et al,(1992), Chandra et al,(2000)].Therefore FLC is adopted to control dc bus capacitor voltage in this paper. HCSLI control of SAPF for power quality improvement is simulated using Mat Lab/simulink. 2. Operation of three phase Hybrid Cascaded Seven Level Inverter This section presents a SAPF in power system application implemented with multiple single-phase cells connected in series combination arrangements as shown in Fig. 1. Each cell is composed by a DC capacitor and a full–bridge single-phase PWM-VSI. Using this type of topology, higher voltage levels can be obtained and medium, high voltage power systems can be compensated. Fig. 1. Simplified schematic diagram of the HCSLI An inductive reactor is connected between the line and SAPF in each phase for isolation purpose. Each power cell will be operated at different DC voltage and constant switching frequency for improving the performance characteristics of proposed system. The switching speed and voltage capability of semiconductor switches used in the system will define the number of total inverters that must be connected in series in each phase to compensate the harmonic currents for a given medium voltage power system [Lund et al,(1999), Grady et al,(1990)]. The voltage at which each cell must operate depends on the number of cells and the total voltage that is to be delivered by the modular inverter. With the combination of 3 kV and 1.5 kV DC bus voltages in this topology, stepped waveforms with seven voltage levels via. -4.5 kV, -3 kV, -1.5 kV, 0, 1.5 kV, 3 kV, 4.5 kV at the output of each phase leg are synthesized. As shown in Fig.1, the higher voltage levels (± 3kV) can be synthesized using GTO inverters while lower voltage levels (± 1.5kV) using IGBT inverters. But it is well known that switching capability of GTO thyristors is limited at high frequencies. Hence a hybrid strategy which incorporates stepped synthesis in conjunction with variable pulse width of the consecutive steps is proposed. ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7038 G. Jayakrishna et al. / International Journal of Engineering Science and Technology (IJEST) The number of output phase voltage levels “m” in a cascaded multilevel inverter is defined by m=2s+1, where s is the number of separate DC sources. The SAPF topology proposed in this paper is shown in Fig. 1. The principal characteristic of the cascaded (modular) topology is suitable for high voltage PS applications. 3. Control Strategy The control strategy adopted for SAPF is shown in figure.2. In this paper d-q reference frame theory is adopted for computing reference currents, CSFMSHPWM technique is used to generate control signals to switching devices of HCSLI and FLC is used for regulating DC side capacitor voltage. 3.1 D-q reference current generator In D-Q-0 theory, three phase load currents are sensed and transformed from a-b-c reference frame to synchronous reference frame d-q coordinates as shown in Eq. (1). cos θ cos θ − π cos θ + π I I I = π π I (1) sin θ − sin θ − − sin θ + I These currents can be decomposed into DC and harmonic components as shown in Eq. (2). Id =Iddc + Idh and Iq = Iqdc + Iqh (2) Fig. 2 Block diagram of the SAPF controller methods along with D-Q-0 theory based reference current generator. The DC components are equivalent to fundamental components in a-b-c reference frame. Passing Id and Iq through two low pass filters, the low frequency components only will be passed through and harmonic component is stopped. Subtracting fundamental component from non-filtered signal results in harmonic component in load current in d-q reference frame as given in Eq. (3). Idh = Id-LPF ( Id) and Iqh = Iq-LPF (Iq) (3) These currents are transformed into a-b-c coordinates by Inverse Park’s transformation as given in Eq. (4). cos θ sin θ I∗ π π cos θ − − sin θ − I I∗ = (4) I I∗ cos θ + π − sin θ + π The three-phase reference compensating currents I*fa, I*fb, and I*fc are compared with the HCSLI compensating currents Ifabc extracted from ac system. Thus three phase reference currents Ica, Icb, and Icc are produced. Compensating current of each phase is amplified by a gain K in order to produce three AC voltage references as given in Eq. (5). Vabcref =K (I*fabc -Ifabc ) (5) ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7039 G. Jayakrishna et al. / International Journal of Engineering Science and Technology (IJEST) Finally, each voltage reference is compared with a multicarrier triangular waveform (1500 Hz) to generate the switching patterns for the HCSLI. 3.2. Constant switching frequency multicarrier pulse width modulation Fig. 3. Constant switching frequency multicarrier sub harmonic Pulse width modulation Fig.3 shows for m-level inverter, m-1 carrier signals with the same frequency fc and same amplitude Ac are disposed such that the bands they occupy are contiguous. The reference waveform has peak to peak amplitude of Am, frequency fm and it is zero centered in the middle of the carrier set. The reference is continuously compared with each of the carrier signals. If the reference signal is greater than the carrier signal, then the active device corresponding to that carrier is switched off. In multilevel inverters, the amplitude modulation index “Ma” and the frequency ratio “Mf” are defined as given in Eq. ( 6) Ma = Am / (m-1) Ac and Mf = fc / fm (6) 3.3. Fuzzy logic based dc bus voltage controller e de NB NM NS ZE PS PM PB NB NB NB NB NB NM NS ZE NM NB NM NM NM NS ZE PS NS NB NM NS NS ZE PS PM ZE NB NM NS ZE PS PM PB PS NM NS ZE PS PS PM PB PM NS ZE PS PM PM PM PB PB ZE PS PM PB PB PB PB Table. 1 Fuzzy rule representation The block diagram of fuzzy logic controller which is used to regulate the dc bus capacitor voltage of SAF is shown in Fig. 2.The dc bus capacitor voltage (Vdc) is compared with a reference voltage (Vdcref).Error and its derivative are applied to the fuzzy logic controller and its output is current command signal. Fig. 4 The degree of membership for (a) the error (b) the derivative of error and (c) the output signal. ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7040 G. Jayakrishna et al. / International Journal of Engineering Science and Technology (IJEST) The two inputs and the output use seven triangular membership functions. The membership values are shown in the Fig. 4. Each input has seven linguistic variables and there are 49 input label pairs. A rule table relating each one of 49 input label pairs to respective output label is given in Table 1. The type of fuzzy inference engine used is mamdani and the centroid method is used for defuzzification. 4. Simulation Results and Discussion This section presents the details of the simulation carried out to demonstrate the effectiveness of the proposed control strategy for the SAPF to reduce the harmonics for linear and non-linear loads. The test power system consists of a three phase voltage source and an uncontrolled rectifier with RL load. The active filter is connected to the test system through an inductor Lf and Capacitor Cf. The values of the circuit elements used in the simulation are listed in Table. 2. The MatLab/simulink is used to simulate the test power system with and without the proposed SAPF at linear and non-linear load conditions. Table 2.Specifications of Shunt Active Power Filter Parameter name Numerical Value Source voltage (Vs) and Frequency 4.5 kV(line r.m.s) , 50 Hz DC Capacitors 5000 µF D.C capacitor reference voltage (each phase) 4.5 kV Switching frequency 1.5kHz Diode rectifier Load resistance and inductance 20 Ω , 0.1 mH Ripple filter inductance , capacitance and resistance 2mH ,100 µF, 0.1Ω Source inductance 15mH 4.1. PS without SAPF 500 400 300 200 Source Current (A) 100 0 -100 -200 -300 -400 -500 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time (s) (a ) (b) Fig.5. a) Three phase source currents of test power system without SAPF b) Harmonic spectrum of phase - a source current without SAPF As shown in Fig. 5(a), the three phase source currents of power system without SAPF in which harmonic pollution is severely affecting the source currents due to reactive power generated by NLDRL and the THD is 12.23% as shown in Fig.5 (b) for phase–a source current. 5.2. PS with SAPF using linear and nonlinear loads The three phase source currents of PS with SAPF for both linear and non-linear loads are shown in Fig. 6. From this figure, it is found that the waveforms of the source currents are almost pure sinusoidal with SAPF for both ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7041 G. Jayakrishna et al. / International Journal of Engineering Science and Technology (IJEST) loads. The load currents for the compensated system in the presence of SAPF with linear and non-linear loads are shown in Fig.7. It can be seen that load currents with nonlinear load have slight deviations in phase angle and load currents with linear load have slight distortion. The shunt current tracking response of SAPF for linear and non-linear loads is shown in Fig. 8. 500 600 400 400 300 200 200 urrent (A) Source Current (A) 100 0 0 Source C -100 -200 -200 -300 -400 -400 -500 -600 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time (s) Time (s) 6(a) 6(b) Fig.6. Three phase source currents of test power system with SAPF (a) Non-linear load, (b) Linear load 600 800 600 400 400 200 Load Current (A) Load Current (A) 200 0 0 -200 -200 -400 -400 -600 -600 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time (s) Time (s) 7(a) 7(b) Fig.7. Distorted three phase load currents of test power system with SAPF (a) Non-linear load, (b) Linear load 50 60 40 40 30 20 Compensated Current (A) Compensated Current (A) 20 10 0 0 -10 -20 -20 -30 -40 -40 -50 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 -60 Time (s) 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time (s) 8( a) 8(b) Fig.8. Three phase compensated current of test power system with SAPF a) Non-linear load, b) Linear load The harmonic spectrum analysis of the source current of phase-a with SAPF for linear and non-linear loads is shown in Fig. 9. It is clearly found that the THD of the source current in phase-a with SAPF for linear load is 1.54%, where as with non-linear load is 3.51%. From Figs. 5(b) and 9, the THD in source currents of test power system with SAPF is very less when compared to without SAPF and it is well below the value specified by IEEE-519 standard. ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7042 G. Jayakrishna et al. / International Journal of Engineering Science and Technology (IJEST) 9(a) 9 (b) Fig.9. Harmonic spectrum of phase-a source current with SAPF (a) Non-linear load, (b) Linear load 5000 4000 3000 Vs d urrent (A) 2000 Supp Voltage (V) an C Is 1000 0 -1000 ly -2000 -3000 -4000 -5000 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time (s) 10(a) 10(b) ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7043 G. Jayakrishna et al. / International Journal of Engineering Science and Technology (IJEST) 10(c) Fig. 10. In-phase source current with supply voltage of phase-a for test power system without SAPF (a) Licear load (b) Non-linear load 10(c) Source voltage and current with SAF for nonlinear load. As shown in Fig. 10(a) the source current is in phase with the source voltage of phase-a with SAPF for linear load. The Fig. 10(b) shows the source current and source voltage for phase-a of test power system with nonlinear load without SAF in which source current is slightly out of phase with source voltage which leads to poor power factor. As shown in Fig.10(c) the source current is almost in phase with source voltage with SAF for nonlinear load. From this figure, it is observed that the proposed SAPF implies a near unity power factor operation in PS for non-linear loads. The seven-level inverter output voltage for phases-a, b and c for non-linear load is shown in Fig. 11(a) and Fig. 11(b) shows inverter output voltage of phase-a. From these figures, it is clearly observed that the proposed PWM control method for SAPF showed better output responses. 5000 5000 4000 4000 3000 3000 Inverter Output Voltage (V) Inverter Output Voltage (V) 2000 2000 1000 1000 0 0 -1000 -1000 -2000 -2000 -3000 -3000 -4000 -4000 -5000 -5000 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time (s) Time (s) 11(a) 11(b) Fig. 11. Seven level inverter output voltages a) for three phases b) for phase –a 6 6 x 10 x 10 3.5 8 3 6 2.5 Real and Reactive Power (W) Real and Reactive Power (W) 4 P 2 2 1.5 0 P 1 Q -2 0.5 Fault applied at time 0.04s Q -4 0 Fault cleared at time 0.072s -0.5 -6 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time (s) Time (s) 12(a) 12(b) Fig.12. Real power (P) and reactive power (Q) flow a) with SAPF b) with SAPF for a three phase fault ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7044 G. Jayakrishna et al. / International Journal of Engineering Science and Technology (IJEST) The Fig. 13(a) shows the real power (P) and reactive power (Q) of the proposed system using non-linear load. From this figure, it is clearly observed the real and reactive power can be enhanced/reduced with SAPF in power system. The Figs. 12(b) to 13 have shown the real and reactive power compensated, load and source currents of proposed SAPF with non-linear load for a three phase fault applied at time 0.04s and cleared at time 0.072s in PS.The compensated currents of SAF for the three phase fault in the system are shown in Fig. 14. 1500 1000 1000 500 500 Source Current (A) Load Current (A ) 0 0 -500 -500 Fault applied at time 0.04s Fault applied at time 0.04s -1000 -1000 Fault cleared at time 0.072s Fault cleared at time 0.072s -1500 -1500 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time (s) Time (s) 13(a) 13(b) Fig.13. Three phase (a) load Currents and (b) source currents of test power system with SAPF for a three phase fault 150 100 urrent (A) 50 onpensated C 0 -50 C Fault applied at time 0.04s -100 Fault cleared at time 0.072s -150 0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1 Time (s) Fig. 14 Three phase compensated current for SAPF for three phase fault 4. Conclusion HCSLI used in SAPF in the test power system is successfully simulated using MatLab/sumulink and its performance is analyzed for linear, non-linear loads and for three phase fault. The CSFMSHPWM method has successfully suppressed the harmonics and improved the power factor on the source side of Power system. REFERENCES [1] Agelidis,V.; Calais,M.(1998): Application specific harmonic performance evaluation of multicarrier PWM techniques, IEEE-PESC’98 Conference Record, pp. 172-178. [2] Carrara,G.; Gardelta,S.; Marchesoni,M.( 1992):”A new multilevel PWM method: theoretical analysis”, IEEE Trans. On power electronics Vol. 7. No. 3, pp.497-505. [3] Chandra, A.; Singh, B.; Singh, B.N.; Kamal Al-Haddad.(2000): “An Improved Control Algorithm of Shunt Active Filter for Voltage Regulation, Harmonic Elimination, Power Factor Correction, and Balancing of Nonlinear Loads”, IEEE Trans on Power Elec. Vol. 15, No. 3. [4] Grady, W.M.; Samotyj, M.J.; Noyola,A.H.(1990): “Survey of Active Power Line Conditioning Methodologies”, IEEE Trans. on Power Delivery, vol. 5, pp. 1536-1542. [5] Khoy,E.E.E.L.; EL-Sabbe,A.; El-Hefnawy,A.; Hamdy,M.M.(2006): Three phase active power filter based on current controlled voltage source inverter, Electrical Power and Energy Systems, 28, 537-547. [6] Liqiao, W.; Ping, L.; Jianlin, L.; Zhongchao, Z.(2004): Study on shunt active power filter based on cascaded multilevel converters, 35th IEEE Power Electr. Spec. Conf. (APEC), vol.5, pp. 3512-3516. ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7045 G. 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Appl., vol. 36, no.5, pp.1405–1412. G.Jayakrishna received B.Tech and M.Tech degrees in Electrical Engineering from Jawaharlal Nehru Technological University, Anantapur, India in 1993 and 2004 respectively, where he is pursuing Ph.D. degree. Currently he is with Department of Electrical and Electronics Engineering, Siddharth Institute of Engineering and Technology, Puttur, India. His research interests include Power Quality and Power Systems. He is Life Member of Indian Society for Technical Education. P.Sujatha is presently working as Associate Professor in Department of Electrical and Electronics Engineering, J.N.T.U.College of Engineering, Anantapur, Andhra Pradesh, India. She completed her B.Tech degree in 1993 and M.Tech Degree with specialization in Electrical Power Systems in 2003 from J.N.T.U. College of Engineering, Anantapur, Andhra Pradesh, India. She has nearly 15 years of teaching experience and her areas of interest include Reliability Engineering with emphasis to Power Systems and Real time Energy Management. She is currently working towards her Ph.D in Electrical Engineering at JNTU Anantapur. K.S.R. Anjaneyulu has pursued his B.Tech, M.Tech and Ph.D. degrees in Electrical Engineering from Jawaharlal Nehru Technological University, Hyderabad in 1982, 1985 and 1999 respectively. He has joined in department of Electrical Engineering, Jawaharlal Nehru Technological University, Anantapur as lecturer in 1985.Currently he is Professor in Electrical Engineering and Director Research and Development Cell, JNTUA, Anantapur. His research interests include Power Systems and Intelligent Techniques. He is Fellow of Institution of Engineers (I) F, Life Member of ISTE and Indian Society of Power Engineers (ISPE). ISSN : 0975-5462 Vol. 3 No. 9 September 2011 7046