Homework 1 – Due: Sep 17, 2010 in MNTL 2258
You are encouraged to work with a colleague, but submit your own write-up. Note, some of these problems will
require you to look up a few things, either online or at the library. Please cite your sources, as you would with
any publication. Three online materials databases you may want to be familiar with are:
http://www.hbcpnetbase.com/
http://www.goodfellowusa.com/A/A.html (see also their comparative data tables)
http://www.ioffe.rssi.ru/SVA/NSM/Semicond
1. Wavelengths: Generate a plot estimating wavelength (in nm) vs. energy (in meV) for electrons,
phonons, and photons in the 0-200 meV energy range. Use the average conduction band effective mass
for electrons in silicon, and Debye model for phonons, also in silicon. Pay attention to the phonon
energy cutoff (kBΘD).
2. Material properties: Look up and put together a table of minimum band gap (eV), relative static
dielectric constant, Debye temperature (K), room-temperature thermal conductivity (Wm-1K-1), and
melting temperature (K) for crystalline diamond, Si, SiC, C (diamond), Ge, GaN, GaAs, AlN, Al2O3,
amorphous SiNx and SiO2, and metals Cu and Pd. Pick at least four out of eight among the crystalline
semiconductors. You can use a spreadsheet to rearrange the materials in order of increasing or decreas-
ing property value. Comment on any trends you observe, and explain in simple terms.
3. Blackbody: (a) Estimate the power density (W/cm2) on the surface of the sun, assuming it is a good
blackbody radiator. (b) Reproduce Fig 1.7 from G. Chen’s book, including a curve for T=300 K.
4. CPU Power Density: (a) Estimate the power density on the surface of a future CarboniumTM pro-
cessor assuming 10% of logic transistors are active at any given time, the minimum energy needed for
a single gate switch is 4kBT (~0.1 eV) and the switching time is ten times the electron scattering time
(10×0.1 ps ≈ 1 ps). Assume the technology half-pitch is F=2 nm (approximate carbon nanotube diame-
ter), average logic transistor area is 30F2 and SRAM bit area is 60F2 (see the ITRS 2009 Edition at
http://public.itrs.net). Assume logic and SRAM cache each share about half the surface of a 3 cm2 chip.
Compare this and p.3(a) with commercial CPU power densities from the class notes, and comment. (b)
How much SRAM cache (in Gb) do you expect to have? (c) How many transistors per chip?
5. Heat Capacity of 2-D Electron Gas: Graphene is a 2-dimensional sheet of hexagonally arranged
carbon atoms. The electron band structure of graphene is linear, with E(k) = ħvF|k| where |k| =
(kx2+ky2)1/2, vF = 106 m/s is the Fermi velocity, and each band is doubly degenerate (in addition to 2×
spin degeneracy). Find the electronic density of states. Then calculate and plot the heat capacity of
electrons in graphene as a function of temperature from 0-2000 K. Use numerical integration to plot,
but simplify final expression as much as possible. For more reading and a nice visual representation
see: http://onnes.ph.man.ac.uk/nano/News/PhysicsToday_2006
6. Heat Capacity of 2-D Phonon Gas: Calculate and plot the heat capacity of acoustic phonons in
graphene with the Debye model and ΘD = 2000 K. Then calculate and plot the heat capacity of optical
phonons in graphene using the Einstein model and a constant optical phonon energy of 0.18 eV. Show
all heat capacities on the same plot (including the electronic component from p.5), between 0-2000 K.
7. Wikipedia: Email the instructor a one-paragraph description of the Wikipedia article you will help
edit, explaining why you are picking it and roughly what kind of updating it needs. Please work in a
small group (2-3 people), and rely on each other’s expertise and backgrounds. The update itself will be
due with HW 2, however the one-paragraph “abstract” and the group should be formed by Sep. 17.
Fall 2010 ECE 598EP | Prof. Eric Pop 1