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TURFProposal Powered By Docstoc
					Proposal Presentation
 February 16, 2004


     Justin Akagi EE 396
   Marcus Suzuki EE 496
   Brent Uyehara EE 496
Overview
   Project Objective
   Background Information
   Problem Details
   Approach
   Potential Problems
   Things We Might Learn
   Possible Deliverables
Project Objective
  To evaluate the triggering capability of the
  STRAW3 chip used in the ANITA project and
  develop a servo-loop for dynamically adjusting the
  trigger threshold.
Background Information
Background Information
   “[ANITA] will examine the ultimate limits of energy in
    the universe by measurements of completely new
    kinds of energetic particles: neutrinos.”
   “Neutrinos are the only known ultra-high-energy
    particles that are able to reach the earth unabsorbed
    cosmological distances.”
   “[It will] probe the nature and origin of the highest
    energy cosmic rays, via the most sensitive
    observation to date of their characteristic neutrino
    by-products.”
Background Information
Background Information
Problem Details
   To record high-energy neutrino events the minimum
    sampling rate is the Nyquist rate.
   We must also sample data over 256 channels.
   It is impractical to record this data continuously
    because it would result in data rates on the order of
    terabytes/second.
   To achieve manageable data rates, we should only
    record sample data during actual neutrino events.
   To do this, we must be able to adjust the trigger
    threshold to recognize events.
Approach
   Debug STRAW3 trigger interface on the RFCeval
    board
       Complete Firmware schematics
       Load and successfully trigger with a parallel to serial
        readout
       Documentation RFCeval trigger operation
       Measurement of trigger threshold curves
   Put together a servo-loop (feedback loop)
       Understand scalar feedback variable
       Specification of the testing protocol
       Coding/evaluation of control loop
Potential Problems
   Software Gremlins
   Hardware Gremlins
   Xilinx demons
   Not enough time
       Only 24 hours in a day
       Only 7 days in a week
       Only 15 weeks in the semester
   Logical flaws
   Unforeseen problems
Things We Might Learn
   Better understanding of computer
    hardware/firmware
   IC design, fabrication
   Reading complicated schematics
   Debugging hardware/firmware problems
   Testing principles
   Equipment: logic analyzer, signal oscilloscope, pulse
    generator
   Software: Linux, Xilinx
   Projects don’t always go as well as we hope
Possible Deliverables
   Triggering capability for the STRAW3 chip
   IEEE or Nuclear Instr. and Methods paper
Thank You!
Questions?
   No?
Thank You!

				
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