STUDY ON THE EFFECT OF HEAT LOSS IN POST EXPOSURE BAKE PROCESS Sarah KIM 1 , Do Wan KIM 1 1) Department of Applied Mathematics, Hanyang University, Ansan 426-791, KOREA Corresponding Author : Sarah KIM, email@example.com ABSTRACT In post exposure bake (PEB) process of semiconductor devices production, a shape of critical dimension (CD) could be changed into an inappropriate form by superﬂuous heating tempera- ture and time of a hot-plate. This is because redundant diffusion of acid can occur from them. In the past, there was little concern about such deformation of CD because the line width of CD that we wanted was relatively thick. However, now we need to control with prudence heating temperature and time of a hot-plate for a thinner line width (ex. sub-32nm) of CD that is used lately. These reasons let us have a desire to start this work. Here we present a mathematical heat conduction model during PEB process for getting suitable heating temperature and time and compute it by using numerical method. Computation of the heat conduction is a very delicate matter, especially because of the mul- tiscale conductivity and thickness of stacked sublayers of the wafer. However, through our method we could markedly reduce the unknowns. Thus, our method brings more cost efﬁcient beneﬁts because we can compute heat transfer only with the averaging interface temperatures which are the reduces unknowns. Also, a system of Volterra-type integral equations for the same number of unknowns could be drived. In other words, we used integral scheme that has several kernels. It is more stable and robust than a difference method. These points could be merits of our work. There are previous works,  and , on this topic. The previous papers stated that the PEB wafer stack was insulated from the surrounding air temperature. That is, there was no consider- ation about heat loss. However, in the PEB process, when heat transfer occurs from one layer to another, there must be temperature leakage into the surrounding air. We propose a new numerical algorithm in which effect of heat loss is added. Finally, we obtain the accurate and efﬁcient results including realistic wafer tests. Reliable results are shown for heat conduction to photoresist on top of wafer during PEB process. PROBLEM SETTING Let us deﬁne u(x, t) as an averaging temperature over each cross section i.e, 1 u(x, t) = T (x, y, z, t)dydz (1) |Sx | where T (x, t), (x = (x, y, z)), is a three-dimensional temperature function in the stack. More- over, Sx is the cross section of the stack at x position on x-axis and the area |Sx | has a constant value. Besides, assume that the stack has thin n-materials which each material has a thermal conductivity κi , a thickness di and a negative constant ci is the ratio of heat loss by the differ- ence of temperature for i = 1, · · · , n. PROBLEM MODELING With an initial condition, u(x, 0) = 0, and two boundary conditions, u(xi−1 , t) = uL (t) and u(xi , t) = uR (t), the averaging temperature u(x, t) in our problem could be governed by the following heat equation. ut = κi uxx + ci (u − u∗ ) (2) where the constant u∗ is the temperature of surrounding air. To make more easy computation, we let the the two boundaries of each material having reference region [0, 1] and not x but x denotes the new region. And then, after solving the PDE, we applied the result into the below interface (or transmission) condition. κi ∂ui κi+1 ∂ui+1 |x=1 = |x=0 (3) di ∂x di+1 ∂x Figure 1. Wafer stack and one-dimensional model REFERENCES 1. KIM, D.W., LEE, J.-E. and OH, H.-K., “Heat Conduction to Photoresist on Top of Wafer during Post Exposure Bake Process: I. Numerical Approach”, Japanese Journal of Applied Physics, Vol. 47, No. 11, pp 8338-8348, 2008. 2. OH, H.-K., KIM, D.W. and LEE, J.-E., “Heat Conduction to Photoresist on Top of Wafer during Post Exposure Bake Process: II. Application”, Japanese Journal of Applied Physics, Vol. 47, No. 11, pp.8349-8353, 2008.
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