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L39 SIMP and Pipelined SIMP

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L39 SIMP and Pipelined SIMP Powered By Docstoc
					                                                              Design of a Simple Customizable Microprocessor
                                                                SIMP – Implementation- Cont’d
* Chapter 7 and 15, “Digital System Design and Prototyping”




                                                                     Control Unit Implementation
                                                                             Main Parts
                                                                             Pulse Distributor
                                                                             Reset Circuitry
                                                                             Operation Decoder
                                                                             Interrupt Circuitry

                                                                 What happens when Power-up or
                                                                  Reset Signal Occurs?
                                                                 An Interrupt Request is Generated?




                                                                                                                  Fig-11: SIMP’s Control Unit

                                                              NDG-L39                       Introduction to ASIC Design                         1
                                                              Design of a Simple Customizable Microprocessor
                                                                SIMP – Implementation- Cont’d
* Chapter 7 and 15, “Digital System Design and Prototyping”




                                                                       Control Unit Implementation –
                                                                           Cont’d
                                                                            Pulse Distributor
                                                               always @(ff)
                                                                module pulsdist(T, clk, clr, ena);
                                                               begin
                                                                output [3:0] T;
                                                                           clr, (ff)
                                                                input clk, case ena;
                                                                           2'b00:
                                                                reg [1:0] ff;          T = 4'h1;
                                                                           2'b01:
                                                                reg [3:0] T;           T = 4'h2;
                                                                           2'b10:      T = 4'h4;
                                                                always @(posedge clk)
                                                                           2'b11:      T = 4'h8;
                                                                begin
                                                                           default: T = 4'h1;
                                                                             if (clr)
                                                                           endcase      ff <= 2'd0;
                                                               end
                                                               endmodule else if (ena)
                                                                                        ff <= ff + 1;
                                                                end


                                                                                                                               Fig-12: Pulse Distributor

                                                              NDG-L39                            Introduction to ASIC Design                               2
                                                              Design of a Simple Customizable Microprocessor
                                                                SIMP – Implementation- Cont’d
* Chapter 7 and 15, “Digital System Design and Prototyping”




                                                                    Control Unit Implementation –
                                                                        Cont’d
                                                                         Operation Decoder




                                                                                     Fig-14: Operation Decoder

                                                              NDG-L39               Introduction to ASIC Design   3
                                                              Design of a Simple Customizable Microprocessor
                                                                SIMP – Implementation- Cont’d
* Chapter 7 and 15, “Digital System Design and Prototyping”




                                                                    Control Unit Implementation –
                                                                        Cont’d
                                                                         Reset Circuitry
                                                                         Interrupt Circuitry




                                                                                         Fig-15: Reset Circuit

                                                              NDG-L39                 Introduction to ASIC Design   4
                                                              Design of a Simple Customizable Microprocessor
                                                               SIMP – Implementation- Cont’d
                                                                    Control Unit Implementation – Cont’d
* Chapter 7 and 15, “Digital System Design and Prototyping”




                                                                       Control Unit - Overall




                                                                                             Fig-16: Control Unit
                                                              NDG-L39                    Introduction to ASIC Design   5

				
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posted:12/20/2011
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