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ESIDE An Integrated Development Environment for Component

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ESIDE An Integrated Development Environment for Component Powered By Docstoc
					                 ESIDE:
An Integrated Development Environment for
  Component-Based Embedded Systems



       Nicholas T. Pilkington, Juncao Li, and Fei Xie
            Department of Computer Science
                 Portland State University
                 Agenda
1.   Problems and Our Contribution
2.   EADL Language as Basis of ESIDE
3.   The ESIDE Environment
4.   Case Study: the TinyOS Platform
5.   Experiences with ESIDE
6.   Future Work


                                       2
   Problems of Co-Development
• The hardware/software boundary…
  – interface is often specified implicitly.
  – tradeoffs insufficiently exploited.
• Simulation and formal verification…
  – are left as a final step before deployment.
  – require separate tools and interfaces.
• Embedded system development…
  – is done without explicit support for re-use
  – or re-used modules introduce high overhead
                                                  3
               Our Contribution
• The Embedded System IDE (ESIDE)
  – Based on the EADL language
  – Provides a unified environment for…
     • Concurrent Hardware/Software Co-Development
     • Co-Simulation, Co-Verification & Co-Synthesis
  – Abstracts architecture from implementation
  – Unifies development across all “platforms”
• Experiences with ESIDE
  – Remodel existing component-based embedded systems
  – Education tool on component-based design in
    Advanced Software Engineering Course           4
                Agenda
1.   Problems and Our Contribution
2.   EADL Language as Basis of ESIDE
3.   The ESIDE Environment
4.   Case Study: the TinyOS Platform
5.   Experiences with ESIDE
6.   Future Work


                                       5
Embedded Architecture Description
       Language (EADL)
• Architecture-only specification
   – No runtime semantics
   – Can be initialized to different embedded platforms
• Encourages re-use on multiple levels of abstraction
   – Ports, components, component templates, and patterns
• Formal properties specified at design-time
• E.g., initialization of EADL to a platform

           Embedded Architecture Description Language

     SW Semantics       Bridge Semantics     HW Semantics
      (e.g., nesC)            (BSL)          (e.g., Verilog)
                                                               6
 Overview of the Language Constructs
Entities                                Templates
Port                                    Port Type
• Service-oriented grouping of events   • Event co-relation similarity
• Service provides-uses relationship

Component                               Component Template
• Unit of reuse                         • Component external similarity
• Component interface based on ports

Architecture                            Architectural Pattern
• Sub-components                        • Component internal similarity
• Sub-component inter-connections


                                                                          7
             EADL - An Example
software component TimerC {
   interface {
      provides StdControl, TimerP as Timer;
      uses PowerManagement, Clock, IOH;
      mapping(Timer, TimerM.Timer);
      mapping(StdControl, TimerM.StdControl);
      mapping(PowerManagement,TimerM.PowerManagement);
      mapping(Clock, TimerM.Clock);
      mapping(IOH, TimerM.IOH);
   }
   configuration {
      component TimerM;
      component NoLeds;
      connection(NoLeds.Leds, TimerM.Leds);
   }
   properties {
      assertion ClockP1
         s1: After_Eventually_(StdControl.init.call=TRUE,
                               Clock.setRate.call=TRUE)
   }
}
                                                            8
                 Agenda
1.   Problems and Our Contribution
2.   EADL Language as Basis of ESIDE
3.   The ESIDE Environment
4.   Case Study: the TinyOS Platform
5.   Experiences with ESIDE
6.   Future Work


                                       9
        Main Features of ESIDE
• Platform-Based Development
  – Choose your own native languages
  – Platform induces semantics into EADL architecture
• Component-Based Co-Design Interface
  – The central aspect of Co-Development
  – Simple, GUI-based drag ‘n drop interface
• Highly Accessible Simulation & Verification
  – Same interface for all development stages
  – Invoke at any time, on partial implementations
• One-Touch Native Language Synthesis
  – Leverage native language tools to compile…
  – The tools are included in the platform package
                                                        10
ESIDE Architecture and Features




                                  11
    Platform-Based Development
• Platforms Provide…
  – Semantics
     • Native Languages (HW, SW & Bridge)
  – Native Tools
     • Co-Simulation Tools and Features
     • Co-Verification Tools and Features
     • Synthesizers from EADL to native languages
  – A Platform Library of Reusable EADL Constructs
     • Ports, components, component templates, and architecture
       patterns


                                                                  12
13
                 Co-Design
• Re-thinking the HW/SW relationship
  – Do away with the old stack-based approach
  – Hybrid components join HW and SW
    • Re-use is independent of the HW/SW boundary
  – Bridge hides HW/SW communication details
    • Makes the HW/SW component interfaces explicit
      and clear
• Component-Based Development
  – Interface functionality encapsulated by ports
  – Behavioral functionality by components
  – Common design trends captured by patterns 14
                   Co-Simulation




•   Co-Simulation is a view-based feature
•   Simulation is supported at TL or RTL levels
•   Native language tools run HW/SW simultaneously
•   Nature of the simulator is highly platform-dependent

                                                           15
                  Co-Verification




•   Properties are specified at design-time, not afterward
•   Verify at any time, even on partial implementations
•   CBD allows for property-based abstractions (efficiency)
•   Current system supports temporal-based assertions

                                                              16
                 Agenda
1.   Problems and Our Contribution
2.   EADL Language as Basis of ESIDE
3.   The ESIDE Environment
4.   Case Study: the TinyOS Platform
5.   Experiences with ESIDE
6.   Future Work


                                       17
          The Platform Languages
• The nesC software language
  –   Developed at UC Berkeley for TinyOS
  –   Component-based specification language
  –   No dynamic memory allocation
  –   Intrinsic support for concurrency and atomicity
• The Verilog hardware language
  – TinyOS is a software language only
  – We re-designed the Mica platform in Verilog
• The BSL bridge language
  –   Developed by our team specifically for this platform
  –   Explicitly describes the interface between HW&SW
  –   Provides Transactors for transaction-level simulation
  –   Compiles to C (nesC compatible) and Verilog code

                                                              18
Simulation on the TinyOS Platform




                                19
                 Agenda
1.   Problems and Our Contribution
2.   EADL Language as Basis of ESIDE
3.   The ESIDE Environment
4.   Case Study: the TinyOS Platform
5.   Experiences with ESIDE
6.   Future Work


                                       20
        Experiences with ESIDE
• We remodeled 12 TinyOS-Based Systems
  – Faithfully preserved the HW/SW stack architecture
  – Converted the code base with very little modification
     • Encapsulation of components
     • Componentized HW/SW interfaces
     • One-to-many port mappings
  – Specified formal properties on the systems
  – Performed verification and simulation
  – Remodeled systems can be synthesized to TinyOS
    deployable code

                                                            21
  Experiences with ESIDE (cont.)
• We gave ESIDE to students at PSU
  –   were from the Advanced Software Engineering Class
  –   had no experience in embedded system design
  –   had no experience in formal verification
  –   were able to design complex and interesting systems
       • A TinyOS networked sensor system (>50 components)
       • A smart home system (>30 components)




                                                             22
     Remodeling TinyOS Systems
# of components in Mica platform library         55    64
# of components in PC platform library           58    63
# of ports/interfaces in Mica platform library   30    49
# of ports/interfaces in PC platform library     29    46
# of components specific for each system         38    41
# of ports/interfaces specific for each system   8     10
# of hardware components developed               N/A   12
# of bridge components developed                 N/A   2
                                                            23
  Simulating the TinyOS Systems
              Co-Simulation Co-Verification
System          RTL      TL      Time    Memory
               (sec)    (sec)    (sec)    (MB)
SenseTask       1.887   0.004    22.34     1.644

SenseToLeds     1.587   0.003    27.02     3.765

SenseToRFM      6.837   0.008    52.61     3.806

CodeBlue        7.456    0.011   34.66     5.792

                                              24
                 Agenda
1.   Problems and Our Contribution
2.   EADL Language as Basis of ESIDE
3.   The ESIDE Environment
4.   Case Study: the TinyOS Platform
5.   Experiences with ESIDE
6.   Future Work


                                       25
                Future Work
• Visual error trace playback feature
  – Simulation: Show the user what’s happening
  – Verification: Play back problematic execution
• Expressiveness of formal properties
  – Include support for resource utilization, e.g.
• Expand the collection of platforms
  – Microsoft Invisible Computing Platform


                                                     26
     Questions?

http://web.cecs.pdx.edu/~xie/co-ver/co-ver-home.htm

     Nicholas T. Pilkington (nickp@cs.pdx.edu)
          Juncao Li (juncao@cs.pdx.edu)
           Dr. Fei Xie (xie@cs.pdx.edu)



                                                      27

				
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