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									AIM :

When we digitize a signal, quantization error is induced. This error is inversely
proportional to the number of levels in the digitization. In case of sound, these levels
correspond to the hearing capability of the human ear. This is because the human ear
can easily distinguish between two “weak” signals but not so easily between two
“loud” ones.

For eg. : Consider 2 sound signals differing by 5 dB. If these signals are in the 100 dB
range [ (+/-) 2.5 ] , then it would be difficult to distinguish between them , than if they
were in the 50 dB range [ (+/-) 2.5 ] .Therefore, this variation essentially corresponds
to a logarithmic function . This advantageous characteristic is made use of in this
project . This can also be thought of as a compression of the signal involved. Hence,
what we intend to do is carry out a logarithmic conversion of the input ( voice –
converted to electric ) , and then digitize this result .

On the output side we convert the digital signal to its analog version and then perform
the analogous function of exponentiation , to get back the original input signal ( With
bit error – ofcourse! ) .
The circuit is basically divided into two parts :
       - Digitization
                a) Obtaining microphone input with gain .
                b) Log amplifier stage.
                c) ADC .

       - Reproduction
             a) DAC
             b) Exponential amplifier.
             c) Push – Pull for speaker .


    a) Obtaining microphone input with gain : The microphone used is a
       condenser microphone. It consists of a capacitor whose capacitance varies
       with vibrations produced by the sound waves. This microphone is biased by
       connecting a 5V supply and a resistor of value 4.7 kohm in series. The output
       is obtained across the resistor. This is amplified by a factor of 200 . Further ,
       all DC levels are removed by a coupling capacitor. ( refer to design issues. ).
       The pure AC signal now obtained is now amplified from the 5-10 mV range to
       0.1 V range .

    b) Log amplifier stage : The output of the previous stage is first given an offset
       of 0.5V, and is applied to the log amplifier stage .( refer to design issues ). The
       log amplifier consists of the CE junction of a transistor ( base grounded)
       connected in parallel with a capacitor .The current „I‟ that flows through the
       transistor is given by I = Io exp (-Vbe/Vt ). Hence the voltage at the output of
       the amplifier will be logarithmic with respect to the input current.

    c) ADC : The output obtained from the log stage is properly loaded with the
       help of a 1Mohm resistor . ( refer to design issues ). To ensure that the input to
       the ADC is always positive, a DC offset is introduced into the signal. Also to
       spread the signal over the whole range of voltages( 0-5V) the signal is
       amplified using an inverting amplifier. This is achieved using a summer
       circuit using a constant source as one of the inputs. The ADC has to be
       provided with certain signals like clock (CLK) , start conversion ( START),
       output enable (OE) and Vref(+/-) . The clk is to be a 1 Mhz, 5V p-p positive
       going square wave which is obtained from the signal generator. The start
       signal consists of an 8Khz signal (sampling rate) 5V p-p positive going square
       wave with a duty ratio ( Ton/Toff) of 1/10 . This is obtained using a 555 timer
       . OE is maintained high at all times . Vref+ is taken to be 5V and Vref- at 0V .

     a) DAC : The output of the ADC is fed into the DAC which gives the output
        back in analog form . Iref+ = 1mA. The analog output received from the DAC
        is fed to an opamp with a resistor in the feedback, to obtain the output signal
        in voltage form. ( DAC provides output as a current signal ).

     b) Exponential amplifier : The CE junction of a transistor is connected to
        noninverting terminal of an opamp . The capacitor is in parallel with a resistor
        in the feedback. Again as before the current varies exponentially with the
        voltage. The signal has to be brought down to the same level as that of the
        output of the log stage. For this the signal has to be de-amplified and be given
        the required offset too. These are achieved using inverting amplifiers and
        summer circuits.

     c) Push Pull for speaker : A very large value of current is required to drive the
        speakers. This is achieved by connecting a PNP and an NPN transistor in the
        push pull configuration. The input current gets amplified by the a factor of
        „beta‟ and the speaker can hence be comfortably run .

     1) DC offset in microphone output : Output of the mic was found to have a
        small DC level . Hence all the amplification could not be provided in one
        stage . After a nominal amplification of 50 , the DC offset had to be eliminated
        using a coupling capacitor of order „ nF‟ . This removed the DC offset and
        produced a pure AC signal .

     2) Low Pass Filter : An active low pass filter was used with capacitor of 0.1 uF
        and resistor of 4.7 kohm in parallel, in feedback .This provides the required
        value of 4 Khz for low pass filtering . Also 4.7 Kohm was attached at the non-
        inverting terminal to give a DC gain of 1, i.e 0 dB .

     3) Voltage follower : This circuit had to be introduced at certain stages to
        provide for drain due to loading current .

     4) Level shifter : After the filter to get a shift of 0.5V, a summer circuit was
        used, with one input of 5V and amplification was 1/10 . Similarly, to provide
        positive voltage to the ADC, the level was shifted by 3V using 12V supply
        and amplification of 1/4 .
5) Loading problem in logarithmic amplifier : The log amplifier was observed
   to provide a high noise level when connected to a load of less than 1Mohm.
   Hence, a 1Mohm load was connected to the output of the log amplifier, and
   the other end to the inverting input of the opamp . So as not to lose out on
   gain, a 1 Mohm had to be connected in feedback. This inturn produced a
   problem of offset voltage due to bias currents . To rid ourselves of this
   problem , a 500 Kohm resistor, was connected to the non-inverting terminal,
   and the other end was grounded. This reduced the offset voltage by an order
   and prevented the opamp from going into saturation .

6) Special signals needed for ADC : The start signal needed by ADC had to
   have a frequency of 8Khz and the length of the pulse had to be of the order of
   10us . A longer pulse would be interpreted as a new start of conversion and
   hence the output would not be obtained . Hence we used an IC 555 to generate
   pulses with t (high)/ t (low) = 10 . Then the output was given to an inverter to
   get the required start pulse. For this : [ R(a) + R(b) ]/ R(b) = 10 ; Capacitor of
   1 nF was used . The required symmetry was thus obtained.

7) Speaker : The base‟s and emitter‟s are common. The NPN‟s collector is put
   to Vcc+ and PNP‟s collector is put to Vcc- .


1) Noise : Noise is added at every point in the circuit. This is added due to
   external electrical disturbances. Also loading of the source by 555 timer
   produces periodic ripples , and these get added as electrical noise in the
2) Inexact reproduction : The exponential amplifier is not an exact inversion
   for the logarithmic amplifier. Even if the output of the log were to be applied
   to the exponential amplifier, we would not get back the original signal .
3) Quantization error : Because of the finite resolution of ADC , all
   information between levels is lost. The output obtained from the DAC is
4) Offsets : The offsets cannot be exactly obtained, because of inexact values of
   resistors ( On account of their tolerances ).
5) Clipping : The output of the logarithmic amplifier is non linear ,and for large
   values the output gets clipped .Also the ADC cannot resolve beyond 5V.
   Hence if the input to the ADC exceeds 5V, it gets clipped .


     Date of submission : 10 /11/03

  GROUP : AMEYA POTADAR (01007017)
          NIKHIL SHETTY (01007007 )
          VIJAY AYYAR   (01007101)

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