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					Programmable controllers – exercises                         1


    SLOVAK UNIVERSITY OF TECHNOLOGY
      Faculty of Material Science and Technology in Trnava




             PROGRAMMABLE CONTROLLERS
                                       EXERCISES



                                D u š a n M udr o nč í k




                                       TRNAVA 2007
 Programmable controllers – exercises                                                  2

       Title


       Simulation of the program module LINEX

       Purpose
       Linear transformation of an unified analogue signal


       Content
       Theory of linear transformation. RATIO and BIAS coefficient derivation. A design,
an implementation, a test and a documentation of the program module. Linear transformation
for the current signal 0 – 20 mA and 4 – 20 mA.


       HW/SW prerequisites
       PC IBM, Windows, pascal/qbasic/c - language


       References
       The textbook Programmable controllers, the section LINEX.


       Exercise frame
       1. To design and to implement the program module LINEX for given RATIO and
          BIAS as well.

       2. To test the program module for given RATIO and BIAS coefficients. To design
          the I/O signal test table .

       3. To derive expressions for RATIO and BIAS coefficients computation, when scales
          of the input signal and output one are given.

       4. To design and implement the program mo0dule LINEX for given scales of input
          signal and output one.

       5. To test the program module for the scale of an input signal 0 – 20 and given (by
          teacher) scale of the output signal. To design the I/O signal test table .

       6. To test the program module for the scale of an input signal 4 – 20 and given (by
          teacher) scale of the output signal. To design the I/O signal test table.
 Programmable controllers – exercises                                                  3


       Title


       Simulation of the program module SQRT

       Purpose
       Square root linearisation of an unified analogue signal


       Content
       Theory of square root transformation. RATIO and BIAS coefficient derivation.
A design, an implementation, a test and a documentation of the program module. The square
root transformation of the current signal 0 – 20 mA and 4 – 20 mA.


       HW/SW prerequisites
       PC IBM, Windows, pascal/qbasic/c - language


       References
       The textbook Programmable controllers, the section SQRT


       Exercise frame
       1. To design and to implement the program module LINEX for given RATIO and
          BIAS as well.

       2. To test the program module for given RATIO and BIAS coefficients. To design
          the I/O signal test table .

       3. To derive expressions for RATIO and BIAS coefficients computation, when scales
          of the input signal and output one are given.

       4. To design and implement the program module LINEX for given scales of input
          signal and output one.

       5. To test the program module for the scale of an input signal 0 – 20 and given (by
          teacher) scale of the output signal. To design the I/O signal test table .

       6. To test the program module for the scale of an input signal 4 – 20 and given (by
          teacher) scale of the output signal. To design the I/O signal test table.
 Programmable controllers – exercises                                                4


       Title


       Simulation of the program modules OBAS and OBTR

       Purpose
       Design, implementation, test and documentation of the program module Analogue
Signal Limitation OBAS.

       Design, implementation, test and documentation of the program module Analogue
Signal Rate Limitation OBTR.


       Content
       The algorithm of limitation of an analogue signal value and of it’s rate of change
derivation. A design, an implementation, a test and a documentation of the program module.


       HW/SW prerequisites
       PC IBM, Windows, pascal/qbasic/c - language


       References
       The textbook Programmable controllers, the sections OBAS, OBTR


       Exercise frame
       1. To derive the algorithm of OBAS program module.

       2. To design and to implement the program module.

       3. To perform a test of program module OBAS for given value of the lower and
          upper limits.

       4. To develop a documentation of the program module OBAS.

       5. To derive the algorithms of OBTR program module.

       6. To design and to implement the program module for an asymmetrical rate limit.

       7. To perform a test of program module OBTR for given value of rate limits:
          symmetrical and asymmetrical rate limits.

       8. To develop a documentation for the both program module OBTR.
 Programmable controllers – exercises                                                 5

       Title


       Simulation of the program module TSTH and FLP1

       Purpose
       Design, implementation, test and documentation of the program module TSTH for
alarm activating with hysteresis and FL1R – 1st. order digital filter.


       Content
       The theory of the algorithm for lower or upper alarms with hysteresis. The theory of
the algorithm of a filter of analogue signal. A design, an implementation, a test and
a documentation of the both program modules.


       HW/SW prerequisites
       PC IBM, Windows, pascal/qbasic/c - language


       References
       The textbook Programmable controllers, the section TSTH and FL1R.


       Exercise frame
       1. To derive the algorithms of lower/upper TSTH program module

       2. To design and to implement the program module.

       3. To perform a test of program module for given value of the lower and upper limits.

       4. To develop a documentation of the program module TSTH.

       5. The steps 1 to 5 repeat for the upper two bands TSTH program module.

       6. To derive the algorithms of 1st. order digital filter FL1R.

       7. To design and to implement the program module.

       8. To perform a test of program module for given value of the time constant.

       9. To develop a documentation of the program module FL1R.
 Programmable controllers – exercises                                                  6


       Title


       Simulation of the program module FLPN and DTIME

       Purpose
       Simulation of the program module FLPN – 1st. order digital filter with conditional
switching.

       Simulation of the program module DTIME – a time delay of an analogue signal
module.


       Content
       The theory of the algorithm of digital 1st. order filter with conditional switching. The
theory of the time delay of an analogue signal algorithm. A design, an implementation, a test
and a documentation of the both program modules.


       HW/SW prerequisites
       PC IBM, Windows, pascal/qbasic/c - language


       References
       The textbook Programmable controllers, the section FLPN and DTIME


       Exercise frame
       1. To derive the algorithms of a digital filter with conditional switching program
             module.

       2. To design and to implement the program module.

       3. To perform a test of program module for given value of a time constant and a gap.

       4. To develop a documentation of the program module FLPN.

       5. To derive the algorithms of DTIME program module.

       6. To design and to implement the program module.

       7. To perform a test of program module for given value of the delay time. .

       8. To develop a documentation of the program module DTIME.
 Programmable controllers – exercises                                                 7

         Title


         Simulation of LEAD/LAG program module.

         Purpose
         Simulation of program module LEAD/LAG – dynamic compensation of an analogue
signal


         Content
         Theory of dynamic compensation block, transfer function. A derivation of the digital
form of the dynamic compensation block. A design, an implementation, a test and
a documentation of program module LEAD/LAG.


         HW/SW prerequisites
         PC IBM, Windows, pascal/qbasic/c - language


         References
         The textbook Programmable controllers, the section LEAD/LAG


         Exercise frame
         1. To derive a discrete form of algorithm LEAD/LAG from it’s transfer function.

         2. To design and to implement the program module.

         3. To perform a test of program module for Td = 0 and given Td.

         4. To perform a test of program module for Td < Ti

         5. To perform a test of program module for Td > Ti

         6. To develop a documentation of the program module LEAD/LAG.
 Programmable controllers – exercises                                                8


       Title


       Simulation of ISA PID algorithm

       Purpose
       Simulation of PID algorithm according it’s ISA form, without limits of the input or
the output of the program module.


       Content
       The transfer function of ISA PID algorithm and a derivation of it’s discrete form,
when the input is a deviation and the output is a computed control action. A design, an
implementation, a test and a documentation of program module ISA PID algorithm.
A modification of the designed algorithm for two inputs – set point and process variable. To
test the program module.


       HW/SW prerequisites
       PC IBM, Windows, pascal/qbasic/c - language


       References
       The textbook Programmable controllers, the section PID algorithm.


       Exercise frame
       1. To derive a discrete form of the PID algorithm.

       2. To design and to implement the program module.

       3. To test the P controller, PI controller and PD controller.

       4. To modify the program module for two inputs – set point and process variable.

       5. Repeat the step 3.

       6. Perform the documentation of the program module PID algorithm.
 Programmable controllers – exercises                                                 9


       Title


       Modification of PID algorithm

       Purpose
       Modification of the PID algorithm on the set point and the controller output limits and
their rate as well. The ideal parallel form of the PID algorithm. The interactive form of PID
algorithm. PI.D and I.PD modifications.


       Content
       The theory of the ideal parallel and the interactive forms of PID algorithm.
A derivation of the discrete form of the both algorithms. A design, an implementation and
a test of the realised programs modules. A programs modules OBAS and OBTR embedding
for the set point and the controller output as well.


       HW/SW prerequisites
       PC IBM, Windows, pascal/qbasic/c - language


       References
       The textbook Programmable controllers, the section PID algorithm classification.


       Exercise frame
       1. To design and to implement the program          module of the ideal parallel PID
           algorithm.

       2. To test the P controller, PI controller and PD controller of the ideal parallel PID
           algorithm

       3. Repeat the steps 1 and 2 for an interactive PID algorithm.

       4. For given type of PID algorithm to apply the program modules OBAS and OBTR
           on the set point and the controller output.
 Programmable controllers – exercises                                                 10


       Title


       Programmable controller KRGN 90 - Introduction

       Purpose
       An introduction to the operating the programmable controller KRGN 90 – the operator
interface, operator functions, a monitoring the process database, engineering functions of the
operator interface.


       Content
       The HW structure of the controller, operator panel functions. Operator functions -
a process database monitoring, manual mode of the control loop, control parameter values
change. Engineering functions – analogue inputs configuration, program configuration,
editing functions


       HW/SW prerequisites
       PC IBM, Windows, KRGN.exe program


       References
       The textbook Programmable controllers, the section Programmable controller KRGN
90


       Exercise frame
       1. A briefly description of the hardware of controller KRGN 90.

       2. A design of the operator panel KRGN 90 – the operator part and the engineering
           part of the panel.

       3. The monitor displays of the operator panel.

       4. Process database monitoring.

       5. The control parameters change, operating the controller in manual mode.

       6. The displays of the engineering part of controller.

       7. Editing keys for program configuration and auxiliary data modification.
 Programmable controllers – exercises                                                      11


       Title


       KRGN – 90 Analogue signal processing, part Analogue input
       configuration

       Purpose
       Analogue signal configuration with default auxiliary data.


       Content
       To linearize an unified analogue signal 0-20mA and 4-20 mA, using the linear
transformation, square root one and user table one. To filter the transformed signal.


       HW/SW prerequisites
       PC IBM, Windows, KRGN.exe program


       References
       The textbook Programmable controllers, the section Programmable controller KRGN
90


       Exercise frame
       1. To transform linear an analogue signal 0 – 20 mA with default AUX data and to
           test it.

       2. To repeat the step 1 for the signal 4 – 20 mA.

       3. To repeat the steps 1 and 2 for square root linearisation.

       4. To repeat the steps 1 and 2 for user table linearisation.

       5. To test the input signal filtering using 1st. order digital filter of KRGN 90.
 Programmable controllers – exercises                                                    12


         Title


         KRGN – 90 Analogue signal processing, part Analogue input
         auxiliary data

         Purpose
         Input scale specification, technological alarms processing, safety alarms processing.


         Content
         To scale the configured analogue input for 0 – 20 mA and 4 – 20 mA. To configure
technological alarms on the both types of input signal. To configure safety alarms and a safety
value.


         HW/SW prerequisites
         PC IBM, Windows, KRGN.exe program


         References
         The textbook Programmable controllers, the section Programmable controller KRGN
90


         Exercise frame
         1. To configure an analogue signal 0 – 20 mA for the lower scale limit and upper
            one, to test the configuration and to document the experiment.

         2. To repeat the step 1 for the input signal 4 – 20 mA.

         3. To configure technological alarms, to test the configuration and to document the
            experiment.

         4. To configure safety alarms, to test the configuration and to document the
            experiment.

         5. To configure an analogue signal according given teacher instructions.
 Programmable controllers – exercises                                            13


       Title


       KRGN 90 – program configuration

       Purpose
       Program configuration, program testing and documentation.


       Content
       To operate the engineering part of the operator panel. Program configuration and
editing. To test the application program modules.


       HW/SW prerequisites
       PC IBM, Windows, KRGN.exe program


       References
       The textbook Programmable controllers, the section Programmable controller KRGN
90


       Exercise frame
       1. To configure a simple program consisting the program module Arithmetic
           operation FNC 30, to test it and to document the experiment.

       2. To configure the program block DTIME and to test it.

       3. To configure the program block LEAD/LAG and to test it.

       4. To configure a simple control loop using PID algorithm FNC 20 with default AUX
           data.

       5. To perform a test of the P controller.

       6. To perform a test of the PI controller.

       7. To perform a test of the PD controller.
 Programmable controllers – exercises                                                  14


      Title


      KRGN 90 – Auxiliary data of control loop

      Purpose
      Control loop aux data specification and testing.


      Content
      To specify sequentially 16 aux data for a control loop, to design a properly tests and to
document experiments.


      HW/SW prerequisites
      PC IBM, Windows, KRGN.exe program


      References
      The textbook Programmable controllers, the section Programmable controller KRGN
90


      Exercise frame
      1. To set the aux parameters OLIL and OLIH, to perform a test and to document the
          experiment.

      2. To set the aux parameters OGRL and OGRH, to perform a test and to document
          the experiment.

      3. To set the aux parameters LSCL and LSCH, to perform a test and to document the
          experiment.

      4. To set the aux parameters GRAD, to perform a test and to document the
          experiment.

      5. To set the aux parameters PALL and PALH, to perform a test and to document the
          experiment.

      6. To set the aux parameters DALL and DALH, to perform a test and to document
          the experiment.
 Programmable controllers – exercises                                                  15


       Title


       Standard control loops configuration

       Purpose
       Standard types of control loops configuration, testing them and documenting.


       Content
       To configure the single control loop, ratio control loop, cascade control loop and feed
forward control loop.


       HW/SW prerequisites
       PC IBM, Windows, KRGN.exe program


       References
       The textbook Programmable controllers, the Section Programmable controller KRGN
90, the Section Control loops configuration on programmable controllers


       Exercise frame
       1. To configure a single control loop, to test the configuration validity and to
          document the solution.

       2. To configure a ratio control loop, to test the configuration validity and to document
          the solution.

       3. To configure a cascade control loop, to test the configuration validity and to
          document the solution.

       4. To configure feed forward control loop, to test the configuration validity and to
          document the solution.

				
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posted:12/4/2011
language:English
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