From Wikipedia, the free encyclopedia IBM AP-101
IBM AP-101
The IBM AP-101 is an avionics computer, used most no- ten independently. The shuttle software was written in
tably in the U.S. Space Shuttle, but since also in the B-52 HAL/S, a special-purpose high-level language, whereas
and B-1B bombers[1] and the F-15 fighter,[citation needed] AP-101s used by the US Air Force are mostly programmed
among others. When it was designed, it was a high-per- in JOVIAL, such as the system found on the B-1B Lancer
formance pipelined processor with core memory. While bomber.[2]
today its specifications are exceeded by many modern
microprocessors, it was considered high-performance for
its era as it could process 480,000 instructions per second
References
(compared to the 7,000 instructions per second of the [1] ^ http://www.hq.nasa.gov/office/pao/History/
computer used on Gemini spacecraft).[1] It remains in computers/Ch4-3.html
service (formerly on the space shuttle) because it works [2] http://business.highbeam.com/438317/
and is flight-certified, whereas a new certification would article-1G1-3161147/jovial-smooth-us-air-force-
be too expensive. The Space Shuttle AP-101s were aug- shift-ada
mented by glass cockpit technology.
The AP-101, being the top-of-the-line of the System/4 Papers
Pi range, shares its general architecture with the System/ • Norman, P. Glenn, IBM Corp. (1987). The new AP101S
360 mainframes.[1] It has 16 32-bit registers, and uses a General-Purpose Computer (GPC) for the Space Shuttle.
microprogram to define an instruction set of 154 instruc- IEEE Proceedings, Volume 75, pp. 308–319, 1 March
tions. Originally only 16 bits were available for address- 1987.
ing memory; later this was extended with four bits from • Vandling, Gilbert C. Organization of a Microprogrammed
the program status word register, allowing a directly ad- Aerospace Computer. Computer Design, pp. 65–72,
dressable memory range of 1M locations. February 1975.
The original AP-101 was built using TTL integrated
circuits. The main memory was originally core memory,
but the AP-101S upgrade in the early 1990s used semicon- External links
ductor memory. • NASA description of shuttle GPCs
The space shuttle used five AP-101s as "general-pur- • NASA history of AP-101 development
pose computers" (GPCs). Four operate in sync, for redun- • Space Shuttle Computers and Avionics
dancy, while the fifth is a backup running software writ-
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Categories:
• Avionics computers
• IBM computers
• Military computers
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