Failure Mechanisms

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					Failure Mechanisms

           Team Members:
           Noah Boydston
             Kyle Brown
           Robert Colville
             Linsy Cook
           Wissam Khazem
            GeeHyun Park
Failure Mechanisms
   IC’s have many subtle flaws that dispose them
    towards failure
   Engineers typically have two tools to minimize IC
    failure
           - Operation under extremely stressful
        conditions to test them
           - Rearranging or improving circuit layout for
        more robust circuit
Electrical Overstress
   Very general type of IC failure of which there are 3
    primary subtypes
       -Electrostatic Discharge (ESD)
       - Electromigration
       - Antenna effect
    Electrostatic Discharge
 When two substances are separated an ES charge
  develops
 Caused by the removal of electrons from surface
  atoms of materials
 Factors
   • Magnitude of static
     charge
   • Intimacy of contact
   • Rate of separation
Electrostatic Discharge
Failures – catastrophic
• Most hard damage to semiconductors occurs below human
  sensitivity around 4000V
• 2 primary hard failure types
    • voltage punch through – CMOS and MOS with very
      thin oxide dielectric layers
    • P-N junction degradation – bipolar circuits excessive
      power dissipation
Electrostatic Discharge
Failures – noncatastrophic / intermittent upset
• Degradation
    • Increased leakage current
    • Lower breakdown voltages of P-N junctions
    • Softening of the knee of V-I curve of a P-N junction
    • Decreased dielectric constant
• Problems may not occur until later with additional stresses
• Intermittent upset – no hard damage, but results in data
  loss or noise
Electrostatic Discharge
Failure Modes
• Thermal Secondary breakdown – high power, small
  junction causes junction melting
• Metallization Melt – ESD causes the metal to melt and
  bond wires to fuse, usually causes and open circuit
• Dielectric Breakdown – high potential difference across a
  dielectric region cause a punch through
• Bulk Breakdown – changes in junction parameters caused
  by excessive temperature at the junction
Electrostatic Discharge
                                                           Resistor
   Susceptibility to ESD
                                      Current                1.5k
   • Human Body Test Model            Limiting
                                      Resistor
      • Simulates a charged                                       Test
                                     Voltage Source Capacitor
                                                                  Device
        person or object that          0-1.5kV DC   100-150pF

        comes into contact with
        a device                        Hum an Body Te st Model

      • Uses a decaying exponential waveform
      • Human Body Capacitance is 50 pF to 200 pF with a
        resistance of 1k to 5k
Electrostatic Discharge
   Susceptibility to ESD
   • Charged Device model
      • Device is charged to between 1 to 1.5 kV
      • One pin is discharged to a low impedance ground

                                     Current
                                     Limiting
                                     Resistor

                                    Voltage Source Test
                                                   Device
                                                            Low
                                      0-1.5kV DC        Impedance



                                       Charged De vice Model
Electrostatic Discharge
                                                                             Barrier/Shielding




Assembly Protection                                                    Barrier/Shielding



• RFI / EMI Design zoning                                    Barrier/Shielding

                                                                 Zone 1
   • sensitive devices shielded by less                          Sensitive
                                                                 Devices


      sensitive parts                                      Zone 2
                                                           Moderately
                                                           Sensitive Devices

• Faraday Shielding - conductive films or foils    Zone 3
                                                   Insensitive
                                                   Devices
   • Increasing the number of ground                             Input/Output
                                                                 Connections

     conductors in a PCB
   • An ESD spark is more likely to hit a rough edge than a
     smooth one so ground is etched with a pattern
Electrostatic Discharge

  Assembly Protection
  • Grounding
     • Multipoint
     • Fishbone type
     • Single point
                          }    Usually a hybrid
                               of these is used.

  • Cabling – wiring to ESD sensitive devices
        Twisted pair         Decreasing
        Shielded pair        Effectiveness
        Plain twisted pair
Electrostatic Discharge
 ESD Protective Equipment
 •   Wrist Straps connected to ground
 •   ESD protective work stations
 •   Protective packaging
 •   Protective bags
 •   Conductive foam
 •   ES detectors
 •   Conductive floors
 •   Special clothing
 •   Air Ionizers
     Protective Circuits to Minimize
     ESD Damage
   Connect external leads to
    high series resistance, shunt
    paths, or voltage clamps

   ESD protective circuits
    provide minimal protection
    often from only as much as
    800 volts

   Such measures do not totally
    eliminate ESD damage but
    reduce it drastically
    More Protection Devices
   Use of Faraday
    Shielding to protect
    from ESD – elaborate
    but highly effective
More Protection Devices
   Circuit diagram and layout of simple zener clamp
More Protection Devices
   Circuit diagram and partial layout of two stage
    zener clamp
More Protection Devices
   Buffered zener
    clamp
Electromigration
• Overview
 Slow wearout of metallization caused by excessive current densities
 Becomes a problem when current densities closely approach or exceed
 500,000 A/cm2
 For sub-micron width leads, this translates to currents of only a few
 milliamps
Causes of Electromigration
   Impacting of electrons
    causes gradual shifting of
    Aluminum atoms from their
    normal lattice sites (see
    picture)

   Aluminum atoms move away
    from grain boundaries
    causing voids to form
    between grains

   Reduced area of wire
    increases resistance and
    worsens problem
      Voiding in Aluminum
Voiding in aluminum
due to electromigration
Preventing Damage From Electromigration
   Refractory barrier metals such as W, Ti, and Mo, can prevent
    catastrophic migration failure

   When overlying Al shifts away, refractory metals remain

   Can be deposited by vacuum metal deposition techniques or by
    sputtering

   Sputtering is usually used because it is cheaper and more
    efficient

   Refractories are especially useful in contacts and vias where Al
    metallization thins
New IBM Chip using only W and
Cu, no Al
Cross section of same IBM Chip
Preventing Damage from
Electromigration - Alloys
   Al metallization is now alloyed with 0.5% to 4.0%
    Cu

   Due to low solubility in Al, Cu accumulates at the
    grain boundaries and helps prevent voiding

   Such an alloy has 5-10 times the current carrying
    capacity of Al alone
Other Migration Prevention
Measures
   Rearranging leads to prevent crossing of oxide steps

   Heating die to smooth corners of oxide steps before
    Al metallization is deposited – improves Al coverage
    of the steps

   Use wider leads than normal when crossing oxide
    steps – leads should widen somewhat before they
    reach the steps

   Compressively stressed overcoats inhibit void
    formation by confining Al under pressure
Other issues of importance in
Electromigration
   Displaced Al can short adjacent leads, so using
    refractory metal is not a perfect solution

   Displaced Al can also seep into damaged
    dielectrics causing a short
Antenna Effect
• Dry Etching
 - Intense E-field

 - Accumulation of electrostatic charges
Antenna Effect
- Gate poly and sidewall spacers

- Degradation of dielectric strength due to current
Antenna Effect
 - Electrostatic charge proportional to area of poly


 - Small gates connected to large poly area can cause significant
 damage
Antenna Effect
 - Poly area acts as antenna


 - Effect also seen during ion implantation of the source / drain regions
Antenna Effect
 - Measurement of effect


 - Magnitude of effect proportional to

              Exposed Conductor Area
                  Gate Oxide Area
Antenna Effect
 - Separate area ratios computed for multiple layers


 - Significant damage

              conductor area > several hundred
                  gate area
Antenna Effect
• Prevention
 - Etching of poly and sidewall spacers

      - Insert of metal jumper

      - Escape route for charges

      - Reduces area of the poly connected to gate oxide

      - Removed after etching or implantation
Antenna Effect
• Prevention
 - Etching of metal layers

      - Layers connected to diffusions provide leak path

      - Jumpers inserted for layers not yet connected to diffusions
Contamination
• Vulnerability
  - Proper manufacturing techniques to minimize contamination

  - Two major types of contamination
    - Dry Corrosion
    - Mobile Ion Contamination (Gee)
Contamination
 As stated by the textbook….

 “The aluminum metal system will corrode if exposed to ionic
 contaminants in the presence of moisture. Only trace amounts
 of water are necessary to initiate this so-called dry corrosion
 All modern integrated circuits are covered with a protective
 overcoat that acts as a secondary moisture barrier.”
    Contamination
• Dry Corrosion
 Water alone cannot corrode aluminum, but many ionic substances dissolve
 in water to form relatively corrosive solutions.

 - Effects

 -Water alone cannot corrode aluminum

 - Phosphosilicate glasses
     - moisture  phosphoric acid  corrosion

 - Halogen Ions
     - Chloride
     - Bromide
Contamination
• Dry Corrosion
 - Preventative Measures

   - Design

     - Minimize the number and size of all PO openings

     - The production die should not include any unnecessary openings

     - Metal should overlap bondpad openings on all sides

      - Openings should be made as small as possible

      - No circuitry should appear within the opening
  Contamination
• Prototype Design / Manufacturing

  - Clean Room
    - Cleanrooms are 10,000 times cleaner than hospital operating rooms
    - Equipment
    - Air / fluid filtration

  - Clothing
    - Can be a 43 step process
Particle Removal
 The clothing worn covers
 most of the body.
 Particle Removal
Air flows across the body to remove
any foreign particles prior to entering
cleanroom.

There is also “self patting” of the
body to knock loose any stubborn
particles.
Particle Removal
 It takes about a minute, but
 one must wait patiently for
 the particle removal process
 to complete
      Particle Removal
All must be serious about maintaining a
    “clean” environment.
   Particle Removal
Air is filtered and supplied to the
lab through a very elaborate duct
system
Contamination
 Some stations have independent air filter systems
   Particle Removal
The system return air is acquired
though floor vents. The supply /
return are both perpendicular to
the room to minimize “swirling.”
Contamination
Fluids are filtered
Contamination
 Tools are kept clean when not in use
Contamination
Materials are protected when
not in use (1/2)
Contamination
Materials protected when not in
  use (2/2)
   Contamination
The cleanroom is kept in a very
orderly condition
Mobile Ion description
   Dissolve in SiO2 at elevated temperatures

   Loss of mobility at normal temperatures
Effect 2/2
   The positive gate repels mobile sodium to oxide-silicon interface
Effect 1/2
Induce parametric shift in MOS transistor at threshold voltage
 Long term failures slow drift of threshold voltage
Temperature Solution
   Bake at 200°C and redistribute mobile ions
Preventative Measures
   Purer chemicals and improve process technique

    Phosphor to gate oxide stabilize to improve alkali metal
    contaminants
Dielectric Polarization
   Threshold shift by dielectric polarization more predictable than
    mobile ions

   Use phosphorus-doped polysilicon gate rather than gate oxides

   Phosphorus-doped polysilicon immobilizes alkali metals

   Moisture from outside package brings in sodium. This can be
    reduced by improving package material to slow ingress of
    sodium ions
Protection Overcoate
   Silicon nitride impermeable to mobile ions

   Phosphorus-doped glasses

   It can serve as a final line of defense against impurities

   Minimum number of probe pads needed, and they should be
    kept far away from sensitive analog circuit
Scribe Seals
   Narrow content strips surrounds active area of die and
    continuous ring

   P-type diffusion

   Guaranteed minimum area of substance contacts
Surface Effect
   Surface region of high electric field intensity

   Surface electric field induces the formation of the parasitic
    channels
Hot Carrier Injection
   Weak electric field causes an overall drift of carriers but does not
    materially affect their instantaneous velocity, while a strong
    electric field actually increases the instantaneous velocity of the
    carriers
Effect




   MOS can generate hot carriers when operated in saturation
    region at high-drain-to-source voltages

   The pinched- off portion of the channel slowly grows wider, aAs
    the drain-to-source voltage increases

   The electric field becomes large to generate hot carriers near
    the drain end of the transistor
Effect On Performance
   Hot carriers produced at the drain end of the transistor collide with
    the lattice atoms

   Few of the recoiling carriers travel upward into the overlying oxide

   Most of the carriers pass trough the oxide and return to the silicon

   Few get trapped at defect sites within the oxide, will represent a fix
    oxide charge
Parametric Shift
   Caused by hot carriers

   Can be partially or completely reversed

   The parametric shift vanishes as the fixed oxide change
    dissipates
Avalanche Junction
   It occurs near the surface in most diffused junction

   Some of the hot carriers produced travel into the overlying oxide

   The avalanche voltage slowly increases during operation (called
    Zener walk-out)
Zener Walkout Mechanism




   Junction diode’s reverse break down is observed using a curve
    tracer

   Emitter-base Zeners can exhibit up to 200mV of walk-out
Preventative Measures1/2
   Lightly Doped Drain (LDD) structure

   Redesign the circuit

   Transistor
     – Used as a switch
     – Fully on in witch they are in linear region
     – Fully off in witch they are in cutoff region
     – They can withstand voltages far beyond the onset of the hot
       carrier
Preventative Measures2/2
   Long channel devices
     – Vicinity of the drain Produce the hot carrier
     – The rest of the channels remains unaffected
     – Increasing the channel length by a few micro far a few extra
       volts

   Base-emitter Zener diode
Special Appearance by:

Carlos, Corey, Eric, and Fariba

				
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posted:11/25/2011
language:English
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