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					                                                                                                 Faults




Lynx II / III Faults

5/12/2003                  Rev e
Notes: All values provided in UPS-Link terms. Overload test uses % power (watts) or % VA, whichever is greater.
Listed Alphabetically by state diagram name

                            State Diagram                                                                                                                           Disp.        Recover-
         Fault                                                         Fault Detection                                           Action Taken                             Ctrl-U
                                Name                                                                                                                                LEDs          able
                                           Upon entering STANDBY or LOW_BATTERY state, from
                                           INITIALIZATION, or upon entering STANDBY from
                                           UPS_FAILURE, the Battery Capacitor Soft-Start Fault                                                                        0
                                                                                                                                                                      1         Can't be in
Battery Capacitor                          detection will be performed.                                 The unit immediately changes state to
                           BAT_CAP_LOW_FLT                                                                                                                            1    11   FAILURE_
Soft Start Fault                           If DC Bus voltage does not charge within 9V of corresponding UPS_FAILURE (less than 1ms)                                   0         BYPASS
                                           battery voltage, within 256 AC line cycles, the Battery                                                                    0
                                           Capacitor Soft-Start fault, will be generated.
                                           Note: The absolute battery voltage should be above 162V.
                                           If unit is in ON_BATTERY (or SELF_TEST) state and PFC                  No immediate action taken. State change will
Battery <-> Line                           relay is welded as detected by hardware (Signal:                       take place in the next AC line cycle (9ms           1
                                                                                                                                                                      0
(PFC Input) Relay Weld     BATT_LN_RLY_WLD /RLYWLD_FLT_SNS, Port1.6 (uP pin 8) pulled low) for 25                 @50Hz or 7ms @60Hz) The UPS will transfer                0D       NO
                                                                                                                                                                      0
fault                                      consecutive AC line cycles (417ms @ 60hz, 500ms @ 50hz)                to FAILURE_BYPASS or UPS_FAILURE state              0
                                           the fault is generated.                                                (See State Diagram.)                                1


                                                  This fault is generated when the Bypass Relay is closed and
Bypass Relay Fault
                                                  the Load Voltage is below 117VAC for 512 consecutive AC                                                             0
(Bypass relay is closed)
                                                  line cycles (10sec @50Hz or 8.5sec @60Hz.)                      No immediate action is taken. Unit will change      1         Can't be in
                           BYPASS_RLY_FLT                                                                          the state to UPS_FAILURE a half of an AC           0    0F   FAILURE_
                                                  This fault is generated when output is off (Output and Bypass                                                       0
                                                                                                                   cycle later (10ms @ 50Hz or 8ms @ 60Hz)                       BYPASS
Bypass Relay Fault                                relays are open) and the Load Voltage is above 117VAC for                                                           1
(Output is off)                                   512 consecutive AC line cycles (10sec @50Hz 8.5sec
                                                  @60Hz)
                                                  Step changes in battery voltage are detected every AC line
                                                  cycle. Step changes are classified as descending (absolute
                                                  battery voltage decreases) or ascending (absolute battery
                                                  voltage increases.) The charger fault counter increments for
                                                  every descending step and decrements for every ascending
                                                  step (counter saturates at 0.) If the counter increments to 10,
Battery Charger Fault
                                                  then the fault will be set.                                        No immediate action taken. State change will     0
(descent method)
                                                  The Battery Charger Fault detection is not performed in            take place in the next AC line cycle (13.3ms     1
                            CHARGER_FAULT         following cases:                                                     @50Hz or 11.1ms @60Hz) The UPS will            0    12       NO
                                                        a) Charger is off                                                 transfer to FAILURE_BYPASS or               1
                                                                                                                                                                      0
                                                        b) Battery voltage is at float or in 5.4V window below float UPS_FAILURE state (See State Diagram.)
                                                  (e.g. 212.7V for 218.1V float)
                                                        c) Battery disconnected test is being performed
                                                  The Battery Charger Fault is detected if charger is on and
Battery Charger Fault                             either battery voltage remains below 145.8V for 64
(hard limit)                                      consecutive AC line cycles. (1.28sec @50Hz, 1.07sec
                                                  @60Hz)



                                                                                              Page 1 of 13
                                                                                    Faults




                     State Diagram                                                                                                                     Disp.        Recover-
            Fault                                         Fault Detection                                          Action Taken                              Ctrl-U
                         Name                                                                                                                          LEDs          able
                                                                                                    The DC Bus Overvoltage Fault will
                                                                                                    immediately turn-off the Inverter in hardware.
                                                                                                    The PFC will be turned off upon detection of
                                                                                                    this fault.
                                                                                                    Case 1 (Inverter relay is closed): The Inverter
                                                                                                    will be commanded off and new state will be
                                     The DC bus overvoltage (Signal: /DCBUS_OV_FLT, Port2.6
                                                                                                    set: UPS_FAILURE or FAILURE_BYPASS                   0
                                     (uP pin 30)) Signal is sampled 4 times per AC line cycle (not                                                       1
DC Bus Overvoltage                                                                                  (see State Diagram.) Should UPS transfer to
                     DCBUS_OVERV     equally spaced.) If the Signal indicates a fault (TTL low) for                                                      0    08     YES
Fault                                                                                               FAILURE_BYPASS state, the Output Relay               0
                                     two consecutive samples, the DC bus overvoltage fault will be
                                                                                                    will be commanded to open and Bypass Relay           0
                                     generated.
                                                                                                    will be commanded to close, immediately.
                                                                                                    Case 2 (Inverter relay is open): The UPS will
                                                                                                    transfer into UPS_FAILURE state at the
                                                                                                    closest AC line phase angle of 67.5 degrees
                                                                                                    (or in less than 18msec @50Hz or 15msec
                                                                                                    @60Hz.)

                                     The Fan Fault Signal: (Signal: /FAN_FLT, IC13 pin 3) is        State transitions in the next AC line cycle (4ms     0
                                     sampled once every 4 AC line cycles. If the Fan Fault Signal   @50Hz 3ms @60Hz)                                     0
Fan Fault              FAN_FAULT                                                                                                                         1    10     YES
                                     is held low for 32 consecutive readings (2.6sec @50Hz 2.1sec   Note: The UPS still tries to control the             1
                                     @60Hz), then the fan fault is generated.                       high/low speed mode selection for the fan.           0




                                                                                Page 2 of 13
                                                                                                Faults




                            State Diagram                                                                                                                           Disp.        Recover-
         Fault                                                       Fault Detection                                            Action Taken                              Ctrl-U
                                Name                                                                                                                                LEDs          able
                                                                                                                 The UPS commands an immediate turn off of
                                                                                                                 the Inverter, the PFC and the Charger. Next,
                                                                                                                 the unit will enter either a FAILURE_BYPASS
                                                                                                                 or UPS_FAILURE state (See State Diagram.)
                                                                                                                 Upon setting the FAILURE_BYPASS state the
                                                                                                                 UPS will command the Bypass and the
                                                                                                                 Backfeed relays to close. Upon setting
                                                The Inverter Fault is generated by hardware interrupt. (A TTL UPS_FAILURE state the UPS will command
Inverter Fault                                  high-to-low transition of the signal: /INV_FLT Port3.2 pin 14 of the Bypass and Backfeed relays to open. For
                                                                                                                                                                           06
(Hardware fault)                                the uP)                                                          either state the unit commands the Output
                                                                                                                                                                      0
                                                Note: Signal must be noise immune!                               Relay to open.                                       0
                               INV_FAULT                                                                         Note: Normal                                         0            NO
                                                                                                                 UPS_FAILURE/FAILURE_BYPASS procedure                 0
                                                                                                                                                                      1
                                                                                                                 timings can not be applied in this case. The
                                                                                                                 rest of hardware control operations (e.g. PFC
                                                                                                                 input relay control) will take place in the next
                                                                                                                 AC line cycle. So, the timings specified will
                                                                                                                 start from phase angle 0.
                                                Inverter's output voltage is tested prior to closing the output
                                                relay. If two consecutive readings (one sample per AC line       No immediate action is taken. All state
Inverter Fault
                                                cycle) are not within 5% of the nominal output voltage setting transitions are taking place in the next AC                 0B
(Output voltage test)
                                                then the Inverter Fault will be generated. (see OVIFL            cycle. (20msec @50Hz, 17msec @60Hz)
                                                worksheet for Actual fault levels)
                                           Samples logic power supply status (Signal: LPS_OK, IC13 pin
                                                                                                                                                                      1
                                           2) 10 times, once per AC line cycle. If the signal is low for 7 Immediately switches in UPS_FAILURE state.                 1         Can't be in
Logic Power Supply Fault   LP_SUPPLY_FAULT or more of the the 10 readings (each reading will be separated (See Normal Behavior for UPS_FAILURE                        0    01   FAILURE_
                                           by approximately 10 microseconds,) then the logic power         State.)                                                    0          BYPASS
                                                                                                                                                                      0
                                           supply fault will be generated.

                                                Any state requiring Inverter to be on will perform an Output
                                                Overvoltage Fault detection. Sampling begins 400ms after last
                                                state change has occurred and takes place every AC line
                                                cycle. Based on the region settings and/or Output Voltage
                                                                                                                 No immediate action is taken. The UPS will           0
High Output Voltage                             selected, the Output Voltage will be compared to the specified
                                                                                                                        transfer to UPS_FAILURE or                    0
                                                (see Output Overvoltage sheet) voltage value. If Output
                            OUTPUT_OVERV                                                                       FAILURE_BYPASS state (see State Diagram)               0    09      NO
                                                Voltage is above specified voltage for 256 consecutive AC line                                                        1
                                                                                                                in the next AC line cycle. (19msec @50Hz or
                                                cycles (5.1sec @50Hz or 4.3sec @60Hz,) then the Output                                                                1
                                                                                                                                16ms @60Hz)
                                                Overvoltage Fault will be generated.
                                                As an extreme overvoltage condition the Output Voltage
High Output Voltage
                                                staying above 269.1 VAC line for 2 consecutive AC line cycles
(Extreme Overvoltage)
                                                will generate the Output Overvoltage fault.




                                                                                            Page 3 of 13
                                                                                         Faults




                           State Diagram                                                                                                                  Disp.        Recover-
          Fault                                                 Fault Detection                                         Action Taken                            Ctrl-U
                               Name                                                                                                                       LEDs          able
                                            The Output Relay fault is generated when the Bypass Relay is
                                            closed and Inverter Voltage is above 117VAC for the duration
                                            of:
Output Relay Fault
                                            512 consecutive AC line cycles on models below 7.5KVA
(bypass relay is closed)
                                            (10.2sec @50Hz or 8.53sec @60Hz)
                                            1024 consecutive AC line cycles for 7.5KVA models and
                                            higher (20.5sec @50Hz or 17.1sec @60Hz)                                                                         0
                                                                                                            No immediate action is taken. The UPS will      0           Can't be in
                                            As the unit transfers from output-off state (e.g. STANDBY or
                           OUTPUT_RLY_FLT                                                                  transfer into UPS_FAILURE state in the next      1      0E   FAILURE_
Output Relay Fault                          SLEEP) to inverter-on state (e.g. ON_BATTERY or                                                                 0
                                                                                                              AC cycle (8ms @50Hz or 6ms @60Hz.)                         BYPASS
(Transferring                               ON_LINE), the load voltage remaining above 117VAC for 60                                                        1
to inverter-on state)                       consecutive AC line cycles will generate this fault (1.2sec
                                            @50Hz, 1sec @60Hz.)
                                            If Load Voltage remains below 117VAC for 512 consecutive
Output Relay Fault
                                            AC line cycles (10sec @50Hz or 8.5sec @60Hz) while
(Inverter is on)
                                            Inverter is on, the Output Relay Fault will be generated.
                                            For the case where the inverter is on, the Overload fault can
                                            be generated via Power or VA percent measurement
                                            (whichever is higher.) Overload occurs at any load greater
Overload
                                            than 104% lasting certain amount of consecutive AC line
(Percent Load                                                                                                                                                      02
                                            cycles (depending on Overload percentage see Overload
Inverter is on)
                                            sheet.) When percent Power or VA measurement is above
                                            174% it will take 25 AC line cycles in order to generate the
                                            Overload Fault.
                                            If Inverter is on and the Output Voltage is below acceptable      No immediate action is taken. All state
                                            level (see: Overload by Output Voltage Sheet) for 256           transitions are taking place in the next AC
                                                                                                                                                          OVERLO
                             OVERLOAD       consecutive AC line cycles (5.1 seconds @ 50Hz 4.3 seconds cycle (19msec @ 50Hz or 16msec @60Hz.)             AD LED
                                                                                                                                                                           YES
Overload
                                            @ 60Hz) then fault is generated.                              The UPS will sound the beeper as long as the             05
(Low output voltage)
                                            Note: If unit is in ON_BATTERY state and the battery voltage            fault conditions are present.
                                            is below 167.4V then OVERLOAD fault will not be generated,
                                            rather the Battery will be considered low.
                                            If the Bypass Relay is closed and either VA or Power reading
                                            (whichever is higher) is above 104% for 256 consecutive
Overload
                                            cycles then Overload fault will be generated.
(Percent Load                                                                                                                                                      03
                                            Note: The OVERLOAD fault will be cleared if the maximum
Bypass Relay is closed)
                                            Power or VA reading (whichever is higher) will remain at 100%
                                            or lower for 64 consecutive AC line cycles.




                                                                                      Page 4 of 13
                                                                                               Faults




                           State Diagram                                                                                                                             Disp.        Recover-
           Fault                                                    Fault Detection                                              Action Taken                              Ctrl-U
                               Name                                                                                                                                  LEDs          able
                                                                                                      No immediate action is taken. All state
                                                                                                                                                                       1
                                         Signal: /HS_OT_FLT (IC13 pin 7) staying low for 2            transitions are taking place in the next AC                      0
Overtemperature          OVERTEMPERATURE consecutive AC line cycles will generate the Overtemperature cycle (4msec @50Hz or 3msec @60Hz.) The                          0      07      YES
                                         Fault.                                                       UPS will transfer to FAILURE_BYPASS or                           0
                                                                                                                                                                       0
                                                                                                      UPS_FAILURE (see State Diagram.)

PFC Failure                                    If Inverter is on and Positive/Negative DC Bus readings are
(Inverter on,                                  below 249.8VDC for 3 consecutive readings (sampled 4 times
hard limit detection)                          per AC line cycle -- not evenly spaced) the fault is generated.

                                                                                                                   No immediate action is taken. The UPS will
                                               If Inverter is on and the difference between absolute positive
PFC Failure                                                                                                             transfer to FAILURE_BYPASS or
                                               and negative DC Bus voltages exceeds 51.75VDC for 128 AC
(Inverter on,                                                                                                      UPS_FAILURE state (see State Diagram.)
                                               line cycles( 2.56sec @ 50Hz, 2.13sec @60Hz), the PFC
delta detection)                                                                                                  State transitions will take place at the closest
                                               Failure is detected.
                                                                                                                  phase angle of 67.5 degrees of AC line cycle.

                                               This fault will be generated if Inverter is off while PFC is
PFC Failure
                                               enabled, and Positive/Negative DC bus readings are below                                                                0
(Inverter off)
                                               351VDC for 256 consecutive AC line cycles.                                                                              0
                            PFC_FAILURE                                                                                                                                1      0A      YES
                                                                                                                                                                       0
                                               As the part of the soft-start procedure (the DC Buses are                                                               0
                                               being pre-charged by closing Backfeed relays,) the PFC
                                               failure detection will be performed. If DC Buses have charged      Upon detection of this fault, the PFC is turned
                                               to within 20VDC of the Peak of Line voltage in 12 seconds,         off immediately, state transitions are taking
PFC Failure                                    then the soft-start procedure will be completed successfully.      place in the next AC cycle (8msec @50Hz or
(Charging up DC Buses)                         However, if by the end of 12 second period, the DC buses are       6msec @60Hz.) The UPS will transfer into
                                               not within the 40.5VDC of the Peak of Line voltage, the PFC        FAILURE_BYPASS or UPS_FAILURE state
                                               Failure fault will be generated.                                   (see State Diagram.)
                                               As the special case the transfer from Failure Bypass state, will
                                               not have 12 second delay period.
                                               Upon entering SELF_TEST or ON_BATTERY state from
PFC Failure                                    STANDBY (cold-boot) the PFC Failure detection will be              Upon detection of this fault, the UPS will
(cold-boot)                                    performed. If DC Buses are below 351VDC for the 12 seconds         immediately enter UPS_FAILURE state.
                                               the PFC Failure fault will be generated.
                                               If Output Voltage is below 30.4 VAC for 25 consecutive AC                                                                           Can't be in
                                                                                                                                                                     OVERLO
Short Circuit              SHORT_CIRCUIT       line cycles (0.5sec @50 Hz or .42sec @60Hz) the Short              Same as overload above.                            AD LED
                                                                                                                                                                              04   FAILURE_
                                               Circuit Fault is generated.                                                                                                          BYPASS
                                                                                                         No immediate action is taken. All state
                                                                                                                                                                       0
                                               If Backfeed Relays are supposed to be open then signal    transitions are taking place in the next AC                   0
Backfeed Relay Weld        XFER_RLY_WLD        BFD_RLY_SNS (IC13 pin 4) remaining low for 25 consecutive cycle. (8msec @50Hz or 6msec @60Hz) The                       0      0C      NO
                                               AC line cycles will generate Backfeed Relay Weld Fault.   UPS will transfer to FAILURE_BYPASS or                        1
                                                                                                                                                                       0
                                                                                                         UPS_FAILURE (see State Diagram.)




                                                                                           Page 5 of 13
                                                                                        Overload



Lynx II Overload Threshold Design
Line 1 - timer based on cycles, effective from 125 - 174%
Slope               -60                                                                                         Overload Threshold
Y-Intercept       10500
                                                                                        180
Line 2 - timer based on cycles, effective from 105 - 124%                               160
Slope              -225
Y-Intercept       31125                                                                 140
                                                                                                                                     Line 1




                                                                       Time (seconds)
                                                                                        120
                           Firmware                     Firmware                                                                     Line 2
   Power       Line 1    Implementation     Line 2    Implementation                    100
    100          90           4500          172.5          8625                          80
    101         88.8          4440           168           8400
    102         87.6          4380          163.5          8175
                                                                                         60
    103         86.4          4320           159           7950                          40
    104         85.2          4260          154.5          7725
                                                                                         20
    105          84           4200           150           7500
    106         82.8          4140          145.5          7275                           0
    107         81.6          4080           141           7050                               100   110   120    130     140   150    160     170   180
    108         80.4          4020          136.5          6825
                                                                                                                       Power (%)
    109         79.2          3960           132           6600
    110          78           3900          127.5          6375
    111         76.8          3840           123           6150
    112         75.6          3780          118.5          5925
    113         74.4          3720           114           5700
    114         73.2          3660          109.5          5475
    115          72           3600           105           5250
    116         70.8          3540          100.5          5025
    117         69.6          3480            96           4800
    118         68.4          3420           91.5          4575
    119         67.2          3360            87           4350
    120          66           3300           82.5          4125
    121         64.8          3240            78           3900
    122         63.6          3180           73.5          3675
    123         62.4          3120            69           3450
    124         61.2          3060           64.5          3225
    125          60           3000            60           3000
    126         58.8          2940           55.5          2775
    127         57.6          2880            51           2550
    128         56.4          2820           46.5          2325
    129         55.2          2760            42           2100
    130          54           2700           37.5          1875
    131         52.8          2640            33           1650
    132         51.6          2580           28.5          1425
                                     Overload



133   50.4   2520      24    1200
134   49.2   2460     19.5    975
135    48    2400      15     750
136   46.8   2340     10.5    525
137   45.6   2280       6     300
138   44.4   2220      1.5     75
139   43.2   2160      -3     -150
140    42    2100     -7.5    -375
141   40.8   2040     -12     -600
142   39.6   1980    -16.5    -825
143   38.4   1920     -21    -1050
144   37.2   1860    -25.5   -1275
145    36    1800     -30    -1500
146   34.8   1740    -34.5   -1725
147   33.6   1680     -39    -1950
148   32.4   1620    -43.5   -2175
149   31.2   1560     -48    -2400
150    30    1500    -52.5   -2625
151   28.8   1440     -57    -2850
152   27.6   1380    -61.5   -3075
153   26.4   1320     -66    -3300
154   25.2   1260    -70.5   -3525
155    24    1200     -75    -3750
156   22.8   1140    -79.5   -3975
157   21.6   1080     -84    -4200
158   20.4   1020    -88.5   -4425
159   19.2    960     -93    -4650
160    18     900    -97.5   -4875
161   16.8    840    -102    -5100
162   15.6    780   -106.5   -5325
163   14.4    720    -111    -5550
164   13.2    660   -115.5   -5775
165    12     600    -120    -6000
166   10.8    540   -124.5   -6225
167    9.6    480    -129    -6450
168    8.4    420   -133.5   -6675
169    7.2    360    -138    -6900
170     6     300   -142.5   -7125
171    4.8    240    -147    -7350
172    3.6    180   -151.5   -7575
173    2.4    120    -156    -7800
174    1.2    60    -160.5   -8025
175     0      0     -165    -8250
176   -1.2    -60   -169.5   -8475
177   -2.4   -120    -174    -8700
                                     Overload



178   -3.6   -180   -178.5   -8925
179   -4.8   -240    -183    -9150
180    -6    -300   -187.5   -9375
                                                               OVIFL



LynxII Output Voltage Inverter Fault Levels:
        Nominal
        Output     Min.        Max.
        Voltage    Voltage     Voltage
        230V       218.7V      242.1V
        240V       228.1V      252.7V
        220V       209.4V      231.6V
        225V       214.1V      237.5V
        208V       197.7V      219.9V
        200V       190.7V      210.6V


        Note: Reaching Max. Value will cause the fault; however, Voltage should be lower than Min. Voltage value to cause the fault.
                                           Output Overvoltage



LynxII Output Overvoltage
        Nominal
        Output    Max.
        Voltage   Voltage     249.2 VAC - 256 AC line cycles overvoltage threshold for 230 volt unit.
        230V          249.2   260.9 VAC - 256 AC line cycles overvoltage threshold for '240' volt unit.
        240V          260.9   238.6 VAC - 256 AC line cycles overvoltage threshold for '220' volt unit.
        220V          238.6   244.5 VAC - 256 AC line cycles overvoltage threshold for '225' volt unit.
        225V          244.5   225.8 VAC - 256 AC line cycles overvoltage threshold for 208 volt unit.
        208V          225.8   216.4 VAC - 256 AC line cycles overvoltage threshold for 200 volt unit.
        200V          216.4   269.1 VAC - 2 AC line cycles extreme overvoltage threshold for all output voltages.
                                    Overload by Output Voltage




Lynx II Overload detection by Output Voltage
       Nominal
       Output    Min.
       Voltage   Voltage
       230VAC    200VAC
       208VAC    176VAC
       120VAC    103VAC
       100VAC    88VAC
Note: All times shown here are offsets from the event of state transition. (AC line phase angle=67.5)
Timing indicates granting of the command, rather then, the completion of the command.

Normal Behavior for UPS_FAILURE State
Previous state had PFC_INP_RLY in to-line position


                                         Timing in (msec/ degrees)
    Device       Position             50 Hz                    60 Hz
                            Tick    Time Phase Angle Tick Time Phase Angle
   Inverter     off           0    ########   067.5ْ     0   ########   067.5ْ
     PFC        off         104    ########   292.5ْ   104   ########   292.5ْ
PFC_INP_RLY to-battery       41    ########   298.1ْ    41   ########   298.1ْ
  INV_RLY      open          48    ########   337.5ْ    48   ########   337.5ْ
  BYP_RLY      open          48    ########   337.5ْ    48   ########   337.5ْ
BATT_SS_RLY open            128    ########   067.5ْ   128   ########   067.5ْ
  BFD_RLY      open         152    ########   202.5ْ   144   ########   157.5ْ
 CHARGER        off         152    ########   202.5ْ   152   ########   202.5ْ

Normal Behavior for UPS_FAILURE State
Previous state had PFC_INP_RLY in to-battery position
                                 Timing in (msec/ degrees)
    Device   Position         50 Hz                    60 Hz
                      Tick Time Phase Angle Tick Time Phase Angle
   Inverter     off     0 ######## 067.5ْ      0 ######## 067.5ْ
     PFC        off    40 ######## 292.5ْ 40 ######## 292.5ْ
PFC_INP_RLY to-battery 0 ######## 067.5ْ       0 ######## 067.5ْ
  INV_RLY      open    48 ######## 337.5ْ 48 ######## 337.5ْ
  BYP_RLY      open    48 ######## 337.5ْ 48 ######## 337.5ْ
BATT_SS_RLY open       64 ######## 067.5ْ 64 ######## 067.5ْ
  BFD_RLY      open    88 ######## 202.5ْ 80 ######## 157.5ْ
 CHARGER        off    88 ######## 202.5ْ 88 ######## 202.5ْ
Normal Behavior for FAILURE_BYPASS State


In Sync (with main):
                                 Timing in (msec/ degrees)
    Device   Position         50 Hz                    60 Hz
                      Tick Time Phase Angle Tick Time Phase Angle
   Inverter     off    64 ######## 067.5ْ 64 ######## 067.5ْ
     PFC        off    40 ######## 292.5ْ 40 ######## 292.5ْ
PFC_INP_RLY to-battery 41 ######## 298.1ْ 41 ######## 298.1ْ
  INV_RLY      open    48 ######## 337.5ْ 48 ######## 337.5ْ
  BYP_RLY     close    20 ######## 180.0ْ 16 ######## 157.5ْ
BATT_SS_RLY close       0 ######## 067.5ْ      0 ######## 067.5ْ
  BFD_RLY     close    84 ######## 180.0ْ 76 ######## 135.0ْ
 CHARGER        off    88 ######## 202.5ْ 88 ######## 202.5ْ

Out of Sync (with main):
                                 Timing in (msec/ degrees)
    Device   Position         50 Hz                    60 Hz
                      Tick Time Phase Angle Tick Time Phase Angle
   Inverter     off    64 ######## 067.5ْ 64 ######## 067.5ْ
     PFC        off    40 ######## 292.5ْ 40 ######## 225.0ْ
PFC_INP_RLY to-battery 41 ######## 298.1ْ 41 ######## 230.6ْ
  INV_RLY      open    40 ######## 292.5ْ 40 ######## 225.0ْ
  BYP_RLY     close    28 ######## 225.0ْ 24 ######## 135.0ْ
BATT_SS_RLY close       0 ######## 067.5ْ      0 ######## 000.0ْ
  BFD_RLY     close    84 ######## 180.0ْ 76 ######## 067.5ْ
 CHARGER        off    88 ######## 202.5ْ 88 ######## 135.0ْ

				
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