Computer Architecture (V112)
Tutorial 1 – Solutions
1
How many bits are required to address a 4M x 32-bit main memory if (a) main memory is word-addressable? (b) main memory is byte-addressable? 20 2 20 22 (a) 4 Mx32-bit = 4 x 2 = 2 x 2 = 2 Therefore 22 bits are required to uniquely address each word. (b) Each word is 32 bits = 4 bytes, and if main memory is byte-addressable we have 4 20 2 2 20 24 x 4 Megabytes i.e. 4 x 4 x 2 = 2 x 2 x 2 = 2 Therefore 24 bits are required to uniquely address each byte.
2
The first two bytes of a 1M x 16-bit main memory have the following hex values: Byte 0 = FFH Byte 1 = 01H If these bytes hold a 16-bit twos complement integer what is its decimal value if (a) main memory is big-endian? (b) main memory is little-endian? (a) Big-endian Word 0 Byte 0 Byte 1 FF 01 hex -> rewrite in binary 1111 1111 0000 0001 is negative, therefore negate to convert, and negate result. Negate -> 0000 0000 1111 1111 is 255 Therefore Word 0 holds the integer –255 10
(b) Little-endian Word 0 Byte 1 Byte 0 01 FF hex -> rewrite in binary 0000 0001 1111 1111 is 511 Therefore Word 0 holds the integer +511 10
N.Dulay
p1
3
Suppose that a 1M x 16-bit main memory is built using 256Kx8-bit RAM chips and that memory is word-addressable. For this memory organisation evaluate: a) the number of RAM chips? b) the number of RAM chips per memory word? c) the number of banks? d) the number of address bits needed for a RAM chip? e) the number of address bits needed for the full Memory? In which bank would the fifteenth memory word (address 14) be found when the memory system uses: f) high-order interleave? g) low-order interleave? Assume banks are numbered from 0. a) (1Mx16) / (256Kx8) = 8 RAM chips b) RAM chips per memory word = Bank Size = 16bit/8bit = 2 c) No. of Banks = RAM chips / Bank Size = 8/2 = 4 d) e) f) g) 2
18
= 256Kb. Therefore 18 address bits are needed.
20
Memory is addressed on a word basis and 1Mword = 2 Therefore 20 address bits are needed 14 div 256K (Chip Length) = Bank 0 14 mod 4 (banks) = Bank 2
4
Suppose that the main memory in question 4 is byte-addressable. For this memory organisation evaluate: a) the number of address bits needed for the full Memory?
In which bank would the eighth memory word (address 14) be found when the memory system uses: b) high-order interleave? c) low-order interleave? Assume banks are numbered from 0. a) Memory is addressed on a byte basis and 1Mx2x8bit = 2 x2 =2 Therefore 21 address bits are needed
20 1 21
For (b) & (c) we need to divide the address by the number of bytes in a memory word since we have byte addressing, e.g. in this case by 2. b) c) (14/2) div 256K (Chip Length) = Bank 0 (14/2) mod 4 (banks) = Bank 3
N.Dulay
p2
5
The answers for questions 2(a) and 2(b) are different. Comment on the implications if we wished to transfer data between a little-endian memory (e.g. on an IBM PC computer) and a big-endian memory (e.g. on an Apple Macintosh computer) ?
For some types & sizes of data we would have to re-order the transmitted data. Students should be able to give examples of which types of data need to be re-ordered?
N.Dulay
p3