Docstoc

Using Code Composer Studio

Document Sample
Using Code Composer Studio Powered By Docstoc
					DSP Getting Started


   Simon Sun 孙巍
simon@seeddsp.com
              Agenda
   Using Code Composer Studio (CCS)
   Analog Interfacing
   Creating A Stand-Alone System
   Using Chip Support Library (CSL)
   Using DSP/BIOS
   Profiler
   Simulator/Emulator
Using Code Composer Studio
            Outline
   Code Composer Studio (CCS)
   Projects
   Build Options
   Build Configurations
   Configuration Tool
   Header Files
   CCS Automation
                     Code Generation

                 Asm
               Optimizer
                                               Link.cmd
         .sa

Editor                            Asm           Linker
                           .asm         .obj              .out
         .c / .cpp
                                                .map

               Compiler
           Code Composer Studio

                          Standard                                  SIM
Compiler                  Runtime
Asm Opto                  Libraries
                                                                    DSK
                                      .out
  Edit          Asm         Link             Debug
                                                                    EVM

DSP/BIOS                 DSP/BIOS
 Config                                                            Third
  Tool                    Libraries                                Party


         DSK’s Code Composer Studio Includes:                       XDS
          Integrated Edit / Debug GUI  Simulator
          Code Generation Tools                                   DSP
          BIOS: Real-time kernel                                  Board
                    Real-time analysis
                                                     CCS is Project centric ...
             Outline
 Code Composer Studio (CCS)
   Projects
   Build Options
   Build Configurations
   Configuration Tool
   Header Files
   CCS Automation
What is a Project?
                     Project (.PJT) file contain:
                     References to files:
                           Source
                           Libraries
                           Linker, etc …

                     Project settings:
                           Compiler Options
                           DSP/BIOS
                           Linking, etc …




  Let‟s look more closely at Build Options and Configurations …
            Compiler Build Options
   Nearly one-hundred compiler options available to tune your
    code's performance, size, etc.
   Following table lists most commonly used options:
             Options                      Description
             -mv6700        Generate „C67x code („C62x is default)
              -mv67p                 Generate „C672x code
             -mv6400                 Generate 'C64x code
            -mv6400+                 Generate 'C64x+ code
             -fr <dir>           Directory for object/output files
             -fs <dir>             Directory for assembly files
                 -g         Enables src-level symbolic debugging
  Debug
                -ss       Interlist C statements into assembly listing
Optimize        -o3         Invoke optimizer (-o0, -o1, -o2/-o, -o3)
(release)        -k             Keep asm files, but don't interlist
 Debug and Optimize options conflict with each other, therefore
    they should be not be used together
                                               These can be set/modified by …
                    Build Options GUI

                            -g -fr“$(Proj_dir)\Debug" -d"_DEBUG" -mv6700




   GUI has 8 pages of
    options for code
    generation tools
   Default build options
    for a new project are
    shown
   Basic page defaults
    are -g -mv6700

                                To make options easier, TI recommends using …
                    Build Configurations
-g -fr“$(Proj_dir)\Debug" -d"_DEBUG" -mv6700
                                                  For new projects, CCS
                                                   automatically creates two
-o3 -fr“$(Proj_dir)\Release" -mv6700               build configurations:
                                                     Debug      (unoptimized)
                                                     Release     (optimized)
                    Build Configurations
-g -fr“$(Proj_dir)\Debug" -d"_DEBUG" -mv6700
                                                           For new projects, CCS
                                                            automatically creates two
-o3 -fr“$(Proj_dir)\Release" -mv6700                        build configurations:
                                                              Debug      (unoptimized)
                                                              Release     (optimized)



                            $(Proj_dir)
                      Indicates the current project
                      directory. This aids in project
                        portability. See SPRA913
                      (Portable CCS Projects) for
                            more information.
      Two Default Build Configurations
-g -fr“$(Proj_dir)\Debug" -d"_DEBUG" -mv6700
                                                  For new projects, CCS
                                                   automatically creates two
-o3 -fr“$(Proj_dir)\Release" -mv6700               build configurations:
                                                     Debug      (unoptimized)
                                                     Release     (optimized)
                                                  Use the drop-down to
                                                   quickly select build config.
      Two Default Build Configurations
-g -fr“$(Proj_dir)\Debug" -d"_DEBUG" -mv6700
                                                  For new projects, CCS
                                                   automatically creates two
-o3 -fr“$(Proj_dir)\Release" -mv6700               build configurations:
                                                     Debug      (unoptimized)
                                                     Release     (optimized)
                                                  Use the drop-down to
                                                   quickly select build config.
                                                  Add/Remove build config's
                                                   with Project Configurations
                                                   dialog (on project menus)
                                                  Edit a configuration:
                                                    1. Set it active
                                                    2. Modify build options
                                                       (shown previously)
                                                    3. Save project
                         Linker Options
Options               Description
-o<filename>          Output file name
-m<filename>          Map file name
-c                    Auto-initialize global/static C variables
-x                    Exhaustively read libs (resolve back ref's)
                                                            By default, linker options
                                                             include the –o option
                                                            We recommend you add
 -c -m "$(Proj_dir)\Debug\lab.map" -o"$(Proj_dir)\De
                                                             the –m option
                                                            “$(Proj_dir)\Debug\"
                                                             indicates one subfolder
                                                             level below project (.pjt)
                                                             location
                                                            Run-time Autoinit (-c) tells
                           $(Proj_dir)\Debug\lab.out
                                                             compiler to initialize
                           $(Proj_dir)\Debug\lab.map         global/static variables
                           Run-time Autoinitialization       before calling main()
                                                            Autoinit discussed in Ch 3
            Outline
   Code Composer Studio (CCS)
   Projects
   Build Options
   Build Configurations
   Configuration Tool
   Header Files
   CCS Automation
DSP/BIOS Configuration Tool




            Simplifies system design by:
               Automatically includes the appropriate
                runtime support libraries
               Automatically handles interrupt vectors
                and system reset
               Handles system memory configuration
                (builds CMD file)
               Generates 5 files when CDB file is saved:
                  C file, Asm file, 2 header files and a
                     linker command (.cmd) file
               More to be discussed later …
            Outline
   Code Composer Studio (CCS)
   Projects
   Build Options
   Build Configurations
   Configuration Tool
   Header Files
   CCS Automation
      Including Header Files in C
/*
 * ======== Include files ========
 */
#include <csl.h>
#include <csl_edma.h>

#include "sine.h"
#include "edma.h"

 1. What is #include used for?
    It adds the contents of the header file to your C file at the
    point of the #include statement.

 2. What do header (.h) files contain?




                                                         Let's look at a header file...
                 Example Header Files
/*                                         /*
 * ======== sine.h ========                 * ======== edma.h ========
 * This file contains prototypes for all    * This file contains references for all
 * functions and global datatypes           * functions contained in edma.c
 * contained in sine.c                      */
 */
#ifndef SINE_Obj                           void initEdma(void);
typedef struct {                           void edmaHwi(int tcc);
    float freqTone;
    float freqSampRate;                    extern EDMA_Handle hEdma;
    float a;
    float b;
                                              Header files can contain any C code to
    float y0;
    float y1;                                  be used over and over again
    float y2;                                 Usually a header file is paired with a C
    …                                          file or library object file. Essentially, the
} SINE_Obj;                                    header file provides a description of the
#endif                                         global items in the “paired” file.
void copyData(short *inbuf, …);               Most commonly, header files contain:
void SINE_init(SINE_Obj *sineObj, …);            Function prototypes
…                                                Global data references, such as
                                                   new type definitions
                                                                                  Therefore...
       Including Header Files in C
/*
 * ======== Include files ========
 */
#include <csl.h>
#include <csl_edma.h>

#include "sine.h"
#include "edma.h"

 1. What is #include used for?
    It adds the contents of the header file to your C file at the
    point of the #include statement.

 2. What do header (.h) files contain?
    They can contain any C statements. Usually, they contain code that would
    otherwise need to be entered into every C file. They’re a shortcut.

 3. What is the difference between <.h> and “.h”?
      Angle brackets <.h> tell the compiler to look in the specified include path.
      Quotes “.h” indicate the file is located in the same location as the file
       which includes it.
            Outline
   Code Composer Studio (CCS)
   Projects
   Build Options
   Build Configurations
   Configuration Tool
   Header Files
   CCS Automation
CCS Automation
   GEL Scripting
   Command Window
   CCS Scripting
GEL Scripting




     GEL: General Extension Language
      C style syntax
      Large number of debugger
       commands as GEL functions
      Write your own functions
      Create GEL menu items
                       Command Window




Some frequently used commands:
   help                        load <filename.out>      run
   dlog    <filename>,a        reload                   run     <cond>
   dlog    close               reset                    go      <label>
   alias   ...                 restart                  step    <number>
   take    <filename.txt>      ba    <label >           cstep   <number>
                                wa <label>               halt
CCS Scripting




           Debug using VB Script or Perl
           Using CCS Scripting, a simple script can:
              Start CCS
              Load a file
              Read/write memory
              Set/clear breakpoints
              Run, and perform other basic debug
               functions
            Outline
   Code Composer Studio (CCS)
   Projects
   Build Options
   Build Configurations
   Configuration Tool
   Header Files
   CCS Automation
Analog Interfacing
                  Learning Objectives
   List various families of TI Analog that connect to DSP systems
   Demonstrate how to find information on TI Analog components
   List key and additional selection criteria for an A2D converter
   Identify challenges in adding peripherals to a DSP design
   Identify TI support to meet above design challenges
   Describe the types of Analog EVMs available from TI
   Select and configure a desired analog system from available EVMs
   Create driver code with the Data Converter Plug-In
   Apply Plug-in generated code to a given system


                                                                       2
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                3
 OP-AMPs/Comparators/Support
                                          TI Analog
 - High Speed Amplifiers
 - Low Power, RRIO Signal Amps
 - Instrumentation Amps                                                         Another
                                                                                             STANDARDS
 - Audio Power Amps                          DATA                                system/
                                                                                             RS232
                                                                               subsystem/
 - Power Amps                            TRANSMISSION                              etc.      RS422
 - Commodity Amps                                                                            RS485
 - Comparators                                                 Data Transmission             LVDS
 - Temp Sensors                                                - Many standards              1394/Firewire
 - References                                                                                USB
 - Special Functions       (Codec)                             - SERDES
                                                                                             PCI
                                                                                             CAN
                                                                                             SONET
                             DAC                   Digital                                   Gigabit Ethernet
                                                    MSP430            RF                     GTL, BTL, etc.
                                                    TI DSP
                                                      etc         RF (or Wireless)
                             ADC                                                         POWER
                                                                                        SOLUTION
                                                  Clocking
Data Converter                                                               Power
                                                  Solution                   - Power Modules
-Standard A/D and D/A
- High Resolution/Precision converters   Clocks                              - Linear Regulators/ LDOs
- High Speed converters                  • Clock Buffer & fanouts            - DC-DC controllers
- Touchscreen controllers                • PLL based buffers & fanouts       - PFC
- m-Law/A-Law Telecom “SLAC”s            • Multipliers & Dividers            - Load Share
- Communication, Video, & Ultrasound     • Jitter cleaners & synchronizers   - Battery Management
  optimized converters/codecs            • Memory specific solutions         - Charge Pumps & Boost Converters
- Audio & Voice band converters/Codecs   • Synthesizers                      - Supervisory Circuits
- Industrial converters                  • Real Time Clocks                  - Power Distribution/Hotswap
                                                                             - References
                                                                                                                 4
TI‟s High-Performance Analog Portfolio




                                         5
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                7
On-Line Data Converter App Notes



                    Most contain downloadable software
                    examples for use with CCS or Embedded
                    Workbench!




                    Click on “Application Notes” from the
                    Product Folder for links to specific devices




                                                                   9
Amplifier Design Utilities




                             10
FilterPro Design Tool




                        11
SWIFT Design Tool




                    12
The I-to-V Pro Tool




                      13
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                14
Application Areas for TI Data Converters
High Speed Comm /            High Precision               Industrial Control /
  Ultrasound                   Measurement                  Instrumentation
    Pipeline ADCs              Over Sampling ∆Σ ADCs     SAR ADCs
    Current Steering DACs         Precision ADCs            High Speed
                                   Micro Systems             Low Power
                                   High Speed ADCs           Simultaneous Sampling
Audio
                                   Current Input ADC‟s
   Voiceband Codecs                                          Bipolar
   Consumer                                                  Data Acquisition Systems
   Professional Audio       Touch-Screen                  String / R2R DACs
                               Controller                     Single Supply

                                 Stand-Alone                 Monitor & Control
 Embedded
                                 Intelligent                 Dual Supply
  High Perf. DSP
  Portable / Low Power
                                 Integrated Audio
  Micro Systems




                                                                                          15
                                 TI ADC Technologies
                                  ADS1625
                                    18 bit Delta Sigma
                                    1.25 MSPS - Fastest on the market
                                    (averages and filters out noise)
                                  ADS1605
                                    16 bit Delta Sigma
                                    5 MSPS                     ADS8411
                                                                  16 bit
                       24                                         2 MSPS
                                                                  Market Leader    ADS5500
                                                                                      14 bit
Converter Resolution




                       20   DS Oversampling                                           125 MSPS
                                                                                      Market Leader

                       16
                                                             SAR
                                                             Successive

                       12                                    Approximation     Pipeline


                        8

                            10    100      1K       10K      100K         1M       10M    100M
                                                  Conversion Rate
                                                                                                       16
                                          TI DAC Technologies
                                                Industrial
                                                Settling Time (µs)
                                                Number of Out put DACs
                                                Resistor String – Inexpensive
Instrumentation & Measurement
                                                R-2R – More accurate -Trimmed at final test
Typically for Calibration
                                                Typically Voltage out
                             20                 MDAC‟s coming (dig control gain/atten, Waveform gen.)

                                                                                High Speed Video and Communication
                                  DS                                            Update rate (MSPS)
      Converter Resolution




                             16                                                 Typically 1 Output but a few 2 Output
                                                                                Current out


                             12
                                                            Resistor String
                                                                   & R-2R                  Current
                                                                                           Steering
                              8


                                   1000   100   10      8      6      4     2       1     .05   .001
                                                       Settling Time- ms
                                                                                                                    17
                        TI Data Converters
                                  DACs – Delta Sigma

                                 High Resolution/Accuracy
                                        DAC122X                 ADCs – Delta Sigma
      ADCs – SAR
     High Precision                                         High Precision Low bandwidth
Medical, Industrial Control,                                         High Bandwidth
    Data Acquisition                                           Intelligent / high resolution
 Simultaneous sampling                                                  8051 core
      Motor control
                                                              Touch Screen Controllers
 DACs – String / R2R
  Low power, Single and                                         Stand Alone Controllers
 bipolar Suppy, Precision                                      Integrated Audio Controllers

                         Audio                        ADCs – Pipeline
            Consumer Codecs, ADC/DAC                 Versatile, High Speed
                 Voice A/C Codecs                   Communication, Imaging,
               Pro audio DACs, ADCs                       Ultrasound
                 PGAs, SRCs, DITs                                                              18
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                19
                     Selecting a Device

   Go to “ti.com” with your browser
   In the Products box, hover over Analog and Mixed Signal & select
    Data Converters
   In the Data Converters Home box in the upper left, hover over Find
    a Device and select Parametric Search
   Pick a bit resolution and sample rate, and a list of suitable devices
    are displayed, comparing numerous additional parameters,
    including:
    Device name        Status          Resolution      Sample Rate
    Architecture       # Channels      SE vs Diff’l    Pwr Consumpt’n
    SINAD              SNR             SFDR            ENOB
    Voltage ranges     Bandwidth       # supplies      Pins/Pkg



                                                                            20
                         ADS8361
  from : http://focus.ti.com/docs/prod/folders/print/ads8361.html
Resolution (Bits)                          16
Sample Rate (max)                          500 KSPS
Search Sample Rate (Max) (SPS)             500000
# Input Channels (Diff)                    4
Power Consumption (Typ) (mW)               150
SNR (dB)                                   83
SFDR (dB)                                  94
DNL (Max) (+/-LSB)                         1.5
INL (Max) (+/-LSB)                         4
INL (+/- %) (Max)                          0.00375
No Missing Codes (Bits)                    14
Analog Voltage AV/DD (Min/Max) (V)         4.75 / 5.25
Logic Voltage DV/DD (Min / Max) (V)        2.7 / 5.5
Input Type                                 Voltage
Input Configuration Range                  +/-2.5 V at 2.5
No. of Supplies                            2

                                                                    21
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                22
                     Design Flow…
   Product Selection
       Key specifications (speed, resolution, …)
       Secondary parameters (power, size, price, channels, …)
       Research data base of candidate devices
       Additional factors: ease of use, cost/value
   Hardware Design
       ADC / DAC pins, requirements
       DSP pin matchup
       Layout considerations (noise, supply requirements, etc
   Software Authoring
       Configuring the (serial) port
       Configuring the peripheral
       Getting/sending data from/to the peripheral
       How? Write it yourself or with the help of an authoring tool…



                                                                        23
    I/O Device Development Challenges

   Hardware Design                         Analog Evaluation Modules
        Pinouts, etc                       (EVMs) : ADC, DAC, Power, ...
        Layout – noise minimization, etc


   Software Design                         Chip Support Library (CSL)
        Select modes for serial port       + Data Converter Plug-In (DCP)

        Select modes for ADC / DAC
        Write modes to port / peripheral


   Debug                                   CCS
        Observe / verify performance
        Modify design as required


                                                                             24
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                25
                         Analog EVMs
   5-6K Interface Board
      Compatible with TMS320 C5000 and C6000 series DSP starter kits
      Supports parallel EVM‟s up to 24 bits
      Allows multiple clock sources for parallel/Serial converters
      Supports two independent McBSP channels
      Provides complete signal chain prototyping opportunities
   Data Converter EVMs
      3 standardized daughter card format (2 serial, 1 parallel)
         Serial – support for SPI, McBSP, I2C; 1-16 I/O channels
      Connects to (nearly) any control system
      Stackable
   Third Party Interface Boards
      Avnet, SoftBaugh, Spectrum Digital, Insight - Memec Design …
   Analog Interface Boards
      Bipolar and single supply
      In development – differential amps, instrumentation amps, active filters
   $50 each!


                                                                                  27
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                28
Data Converter Plug-In
                      Allows rapid
                       application
                       development
                      Automatically
                       generates required
                       DSP source code
                      Removes the
                       necessity to learn
                       the converter “bit
                       by bit”
                      Includes help for
                       device features
                      Fully integrated
                       into Code
                       Composer Studio
                       (2, 5, and 6K)


                                            29
Launching the Data Converter Plug-In




                                       30
Adding an Instance of the Desired Converter




                                              31
Specify the Configuration
        Define the DSP properties
        Set desired ADC modes
        Write files…




                                    32
DCP Files Added to CCS Project


                             “API” file
                           prototypes the 6
                           functions
                           generated by the
                           DCPin tool


                              Object file
                           implements all
                           device coding
                           and creates
                           structures that
                           manage the
                           behavior of the
                           device


                                             33
Files Generated by Data Converter Plug-In
   tidc_api.c
       Set of API that all Data Converter Plug-In authored code supports
   tidc_api.h
       Header file common to all Data Converter Plug-In generated code
   dc_conf.h
       Configuration data that holds the selections made in the Plug-In
   tads8361_ob.c
       Implementation of the API for the given device instance
   tads8361.h
       Header file to define the exposed object specific elements

All are fully coded by the Plug-In
All are fully exposed to the user for study/modification as desired

                                                                            34
   Data Converter Plug-In Uniform API
  DCPAPI TTIDCSTATUS dc_configure(void *pDC);

  DCPAPI long dc_read(void *pDC);

  DCPAPI void dc_rblock(void *pDC, void *pData,
                          unsigned long ulCount,
                          void (*callback) (void *));

  DCPAPI void dc_write(void *pDC, long lData);

  DCPAPI void dc_wblock(void *pDC, void *pData,
                          unsigned long ulCount,
                          void (*callback) (void *));

  DCPAPI void dc_power(void *pDC, int bDown);


All objects created with the Data Converter Plug-In share these six API



                                                                          35
        Data Converter Plug-In Structures
        TADS8361
hADC     *configure // DC API
         *power
         *read
         *write
         *rblock
         *wblock
         0, 0, 0, 0, // unused
         *CallBack                    DCP_SERIAL
         serial                        port
         iMode                         intnum                       MCBSP_Obj
         Buffer    // data bk ptr      hMcBsp                        allocated
         ulBuffSize // data bk size    sConfig         CSL           xmtEventId
         iXferInProgress                              Config         rcvEventId
                                                     Structure       *baseAddr
                                                                     drrAddr
Interacting with the structures...
                                                                     dxrAddr
TADS8361 * hADC; // make a handle to the DC structure
hADC = &Ads8361_1; // initialize handle to point to our instance
MCBSP_getRcvAddr(hADC->serial->hMcbsp); // obtain info from instance object->substruc

                                                                                        36
    Data Converter Plug-In Review

   Greatly reduces development time
   For the DSP software developer: No need to learn
    the details of the converter
   For the analog designer: No need to learn DSP
    programming to test a give data converter
   Supports 117 devices on 5 DSP platforms
   Where to get the Data Converter Plug-In plug-in :
       Included in Code Composer Studio
       Download (free of charge) from :
        http://www.ti.com/sc/dcplug-in




                                                        37
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                38
               Adapting Lab 6 Code
main.c
 #include "dc_conf.h"
 #include "t8361_fn.h“
 ...
 initMcBSP();
       dc_configure(&Ads8361_1)
 if (dc_configure(&Ads8361_1) != TIDC_NO_ERR)
               return;

mcbsp.c
 ...
 MCBSP_close(hMcbspControl);
 *((unsigned char*)0x90080006) |= 0x01;

edma.c
 TADS8361 *   hADC;
 hADC = &Ads8361_1;
            EDMA_open(EDMA_CHA_REVT0,
 hEdmaRcv = EDMA_open(EDMA_CHA_REVT1, EDMA_OPEN_RESET);
 gEdmaConfigRcv.src = MCBSP_getRcvAddr(hMcbspData);
                      MCBSP_getRcvAddr(hADC->serial->hMcbsp);
                                                                39
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                40
                Observations of Results
Audio sounded ‘scratchy’ - Why?


   8361 puts channel number in 2 MSBs
       We can adapt the CSL structure to change this
       We could mask off those bits before passing data to the algo
       In “real life”, we‟d probably want these bits to verify channel #
   Mismatched data rates between input and output
       In real-life situation, one wouldn‟t still be using half a codec, so
        this problem would not have been encountered normally
       If such a case did arise, we could have:
            Rewired the ADC to run off the clocks provided by the codec
            Adjusted rates to match in software
            Sample-rate converted in the DSP

                                                                               41
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                42
Conclusions on TI DSP + TI Analog …
   TI offers a large number of low cost analog
    EVMs to allow developers to „snap together‟
    a signal chain for ultra-fast test and debug
    of proposed components
   TI provides CSL and Data Converter Plug-In
    to vastly reduce the effort in getting a DSP
    to talk to ports and peripherals
   Getting to „signs of life‟ result is now a
    matter of minutes instead of days/weeks
   Final tuning will sometimes be required, but
    amounts to a manageable effort with a
    device already easily observed, rather than
    „groping in the dark‟ as often was the case
    otherwise

                                                   43
     Interfacing TI DSP to TI Analog

TI Analog
Finding Information
Data Converters
Selecting An Example ADC
Development Challenges
Analog EVMs                 A/D
                                  11100010011
Data Converter Plug-In
Completing the Code
Build, Run, Evaluate
Lessons Learned
Additional Information…


                                                44
                      Driver Object Details
t8361_ob.c         code to implement the DC API, eg: read fn
long ads8361_read(void *pDC)                                prototype of the DC API
{
  TADS8361 *pADS = pDC;                                     get handle to object
  if (!pADS) return;                                        parameter check
  if (pADS->iXferInProgress) return;                        verify no bk op in progress
  while (!MCBSP_rrdy(pADS->serial->hMcbsp));                actual SP ops use CSL API
  return MCBSP_read(pADS->serial->hMcbsp);                  when SP ready, return data rcvd
}                                                           spin loop – oops ! !

t8361_ob.c make & fill instance obj     t8361_ob.c       define instance object type
TADS8361 Ads8361_1 = {
                                      typedef struct {
   &ads8361_configure,
   &ads8361_power,                      TTIDC            f;    // std DC API
   &ads8361_read,                       void             (*CallBack)(void *);
   &ads8361_write,                      DCP_SERIAL       *serial;
   &ads8361_rblock,                     int              iMode;
   &ads8361_wblock,
   0, 0, 0, 0, 0,                       int*             Buffer;
   &serial0,                            unsigned long    ulBuffSize;
   ADC1_MODE,                           volatile int     iXferInProgress;
   0, 0, 0                            } TADS8361;
};

                                                                                              45
                    Structure Definitions
                          from TIDC_API.h
                           typedef struct {
                            unsigned int                port;               Number of serial port used
                            unsigned short              intnum;             Which interrupt driver uses
                            MCBSP_HANDLE                hMcbsp;             Serial port handle (CSL)
                            MCBSP_CONFIG                sConfig;            Ptr to CSL ser pt config struc
                           } DCP_SERIAL;
from csl_mcbsp.h
typedef struct {
 Uint32 allocated;                         Is port available?
 Uint32 xmtEventId;                        Which ints port will use
 Uint32 rcvEventId;
 volatile Uint32 *baseAddr;                Address of port registers
 Uint32 drrAddr;                           *Data receive register
 Uint32 dxrAddr;                           *Data transmit register
} MCBSP_Obj, *MCBSP_Handle;
         typedef struct {
            TTIDCSTATUS (*configure) (void *pDc);                from TIDC_API.h
            void (*power) (void *pDc, int bDown);
            long (*read) (void *pDc);
            void (*write) (void *pDc, long lData);
            void (*rblock) (void *pDC, void *pData, unsigned long ulCount, void (*callback) (void *));
            void (*wblock) (void *pDC, void *pData, unsigned long ulCount, void (*callback) (void *));
            void* reserved[4];
         } TTIDC;
                                                                                                             46
Analog Design Tools in Development
OpAmpPro - Input data selects IC
   Input data contains transfer function
   Input data selects the appropriate circuit
   Program enables adjustment resistor & worst case calculations
   Op Amp Pro selects IC by analyzing applications and input data
   Calculates error due to external component & IC tolerances


Tina-TI Spice Simulation Program
   To be offered free on www.ti.com
   Uses TI‟s SPICE macromodels
   Allows general spice circuit simulation
   Analysis
   Circuit optimization



                                                                     47
Creating A Stand-Alone System
            Outline
   Flow of events in the system
   Programming Flash
   Flash Programming Procedure
   Debugging ROM‟d code
     Creating a Stand-alone System

    CCS                         C6x        Flash
                                CPU
                       Codec
                                          S     S
                               RAM        D     R
                                          R     A
                  ..                      A     M
                  ..                      M
                  ..


   What is the flow of events from reset to main()?
   How do you create a stand-alone system?
             System Timeline
  Hardware            Software
Reset
 H/W
Device
Reset
                             Reset
                              Reset
             RESET          h/w status
                            actions taken


   When RESET goes high, the following occurs:
       Sample endian pin
       Sample boot pins
       Many registers are initialized to default values
        (always a good idea to initialize them anyway)
       Peripherals are reset
       Cache: L1 on, L2 off
       Interrupts off
                  System Timeline
  Hardware                 Software
Reset    EDMA
 H/W
Device    Boot
Reset    Loader
                  What is a Boot Loader?
                             C6000
            Src                                    Dest
        “slow”            “Boot loader”            “fast”
                            (EDMA)
           Host mP                                Int mem
           Ext memory                             Ext mem


   In most systems, information must be moved before
    CPU execution begins. For example:
       It could be from slow, flash ROM to fast RAM
       Or, from the host memory to the DSP
   C6000 uses the EDMA for Memory-to-Memory transfers
   After boot, CPU always starts executing at address 0
                             C671x Boot
0000_0000        reset
                                                    „C671x
                  L2                                             H
                                                                 P       Host
                                              L2    EDMA         I
                 CE0
                                                     Boot     CPU
                 CE1                                 Logic
                             1KBytes
                 CE2                     RESET               BOOT Pins

                 CE3
                                                   HD[4:3]   Boot Modes
   Mode 0: Host boots C671x via HPI                 00      Host Boot (HPI)
   Modes 1, 2, 3: Memory Copy                       01      8-bit ROM
      EDMA copies from start of CE1 to 0x0
                                                     10      16-bit ROM
      Uses default ROM timings
      After transfer, PC = 0x0                      11      32-bit ROM
      Bootloader copies 1K bytes
   Must always boot (No “no-boot” option)
                              C64x Boot
0000_0000        reset
                                                   „C64x
                  L2                                           P H
                                                               C P      Host
     EMIFA        CE0                     L2       EDMA        I I
                  CE1
                  CE2
                  CE3                               Boot     CPU
                                                    Logic
     EMIFB        CE0
                  CE1                   RESET               BOOT Pins
                  CE2         1KBytes
                  CE3
                                                   BEA[19:18] Boot Modes
   Mode 0: No Boot bootmode; CPU starts at 0x0       00    None
   Mode 1: Host boots C64x via HPI or PCI            01    Host Boot (HPI/PCI)
   Mode 2: Memory Copy                               10    EMIFB (8-bit)
     EDMA copies from start of EMIFB CE1 to 0x0
                                                      11    Reserved
     After transfer, PC = 0x0
     Bootloader copies 1K bytes
                       System Timeline
  Hardware                                    Software
Reset         EDMA     boot.asm
 H/W
Device         Boot    2nd Boot
Reset         Loader    Loader


           No Boot
              or
           From
            EPROM
              or
           Via HPI



    Software begins running at address 0 (Reset Vector)
                          User Boot Code
                                                        boot.asm
   Your 2nd Boot Loader should               ; Configure EMIF
    perform the following tasks:                ...

        (Optional) Self-Test routine
        Configure the EMIF                   ; Copy Initialized Sections
        Copy section(s) of code/data           mvkl FLASH, A0
        Call _c_int00()                        mvkh FLASH, A0
                                                mvkl IRAM, A1
   Code size is limited to 1K bytes
                                                ...
   1K memory can be reused using
    overlay (we do this in an optional lab)
                                              ; Start Program */
   BOOT.ASM written in assembly
                                                b     _c_int00();
    (because it’s called before the
     C-environment is initialized)
                       System Timeline
  Hardware                                              Software
Reset         EDMA      boot.asm         Provided
 H/W                                       by TI
Device         Boot        2nd Boot      BIOS_init
Reset         Loader        Loader       ( _c_int00 )


           No Boot     EMIF
              or        Self test
           From          Load
            EPROM          remaining
              or           initialized
           Via HPI
                           sections



    Software begins running at address 0 (Reset Vector)
    When using “Boot Loader”, reset vector = address of boot.asm
    If “Boot Loader” is not used, then usually Reset Vector = BIOS_init().
                BIOS_init (_c_int00)
   Initialize the C             Initialize C environment:
    environment …                     Init global and static vars
                                       (copy .cinit  .bss )
                                      Setup stack pointer (SP) and
                                       global pointer (DP)

   Initialize BIOS              Initialize BIOS
                                      Create DSP/BIOS objects
                                      Bind IOM device drivers
                                      Set NMIE = 1
   … and then                   Call main( )
    call main()


        Note: When using a .cdb file, reset vector defaults to _c_int00
                       System Timeline
  Hardware                                                 Software
Reset         EDMA      boot.asm         Provided              main.c
 H/W                                       by TI
Device         Boot        2nd Boot      BIOS_init           System
Reset         Loader        Loader       ( _c_int00 )       Init Code


           No Boot     EMIF               Initialize:Initialize
                                                                         Same stuff
              or        Self test
                                             Stack     periph‟s         we‟ve been
                                             Heap
           From          Load              Globals  Enable           doing in our
            EPROM          remaining                    indiv ints      lab exercises
              or           initialized    Bind IOM
                           sections        devices  Return();
           Via HPI
                                          Enable
                                           NMIE
    Software begins running at address 0 (Reset Vector)
    When using “Boot Loader”, reset vector = boot.asm
    If “Boot Loader” is not used, then usually Reset Vector = BIOS_init().
                       System Timeline
  Hardware                                                 Software
Reset         EDMA      boot.asm         Provided              main.c   Provided
 H/W                                       by TI                          by TI
Device         Boot        2nd Boot      BIOS_init           System     BIOS_start
Reset         Loader        Loader       ( _c_int00 )       Init Code


           No Boot     EMIF               Initialize:Initialize
                                                                          GIE = 1
              or        Self test
                                             Stack     periph‟s
                                             Heap
           From          Load              Globals  Enable
            EPROM          remaining                    indiv ints
              or           initialized    Bind IOM
                           sections        devices  Return();
           Via HPI
                                          Enable
                                           NMIE
    Software begins running at address 0 (Reset Vector)
    When using “Boot Loader”, reset vector = boot.asm
    If “Boot Loader” is not used, then usually Reset Vector = BIOS_init().
                       System Timeline
  Hardware                                                 Software
Reset         EDMA      boot.asm         Provided              main.c   Provided      Provided
 H/W                                       by TI                          by TI         by TI
Device         Boot        2nd Boot      BIOS_init           System     BIOS_start    DSP/BIOS
Reset         Loader        Loader       ( _c_int00 )       Init Code                 Scheduler


           Boot frm    EMIF               Initialize:Initialize
                                                                          GIE = 1      Runs IDL
            EPROM       Self test
                                             Stack     periph‟s                          if no
              or                             Heap                                        other
                          Load              Globals  Enable                            threads
           Via HPI        remaining                    indiv ints
              or           initialized    Bind IOM                                       are ready
                           sections        devices  Return();
           No Boot
                                          Enable
                                           NMIE
    Software begins running at address 0 (Reset Vector)
    When using “Boot Loader”, reset vector = boot.asm
    If “Boot Loader” is not used, then usually Reset Vector = BIOS_init().
            Outline
 Flow of events in the system
   Programming Flash
   Flash Programming Procedure
   Debugging ROM‟d code
            Non-Volatile Memory
Non-volatile Options
   ROM
   EPROM                                 Flash
                       C6000
   FLASH
                        CPU
                                      S
                        RAM           D        R
                                      R        A
                                      A        M
                                      M




                       How do you program a FLASH memory?
       Flash Programming Options
Method      Description                             Target?
Data I/O       Industry-standard programmer        Any

FlashBurn      CCS plug-in that writes to flash     Any
                via JTAG (DSK, EVM, XDS)

BSL            Board support library commands       DSK
                such as flash_write()
               “On the fly” programming

Custom         User writes their own flash alg     Target
                                                    Specific




                                             How does FlashBurn work?
                               Flashburn
    CCS
                            EPROM
                            image                                    DSK
                             file
                                                           DSP
                             FBTC                           L2
                              file                         RAM

1. Flashburn plugin downloads and runs the FBTC file
   (FlashBurn Transfer Control) to establish continuous link      Flash
   between CCS & DSP.
2. Choose “Erase Flash” to tell FBTC program running on DSP
   to erase the flash memory.
3. Select “Program Flash” to stream the EPROM image file (.hex)
   down to the DSP.
•   The FBTC program must be customized for whatever flash
    memory is on the target board (documentation is provided).
            Outline
 Flow of events in the system
 Programming Flash
   Flash Programming Procedure
   Debugging ROM‟d code
                 Debug Flow



      CCS                 app.out            Build


FileLoad Program…
                                       DSK
                     C6x
                     CPU
                                    Flash
                     L2
                               SDRAM
                Flash Data Flow

                hex.cmd


app.hex          hex6x             app.out                Build


     app.cdd
                                                   DSK
                            C6x
                            CPU
    FlashBurn                                Flash
                            RAM




                    What is the procedure for creating a standalone system?
             Flash/Boot Procedure
1   Plan out your system‟s memory map – Before and After boot.
        Verify address for “top of Flash memory” in your system
        Plan for BOOT memory object 1KB in length
          o Created for secondary boot-loader (boot.asm)
          o Not absolutely required, but provides linker error if
            boot.asm becomes larger than 1KB
             Flash/Boot Procedure
1   Plan out your system‟s memory map – Before and After boot.
        Verify address for “top of Flash memory” in your system
        Plan for BOOT memory object 1KB in length
          o Created for secondary boot-loader (boot.asm)
          o Not absolutely required, but provides linker error if
            boot.asm becomes larger than 1KB
        Note, when using the hardware boot, you do not have to
         relink your program with run/load addresses, HEX6x will
         take care of this for you (step #4)
   System Memory Map (load vs. run)
                Load-time                                         Run-time
0000_0000                                          0000_0000         BOOT
                                                                   “boot.asm”
                                                   0000_0400           IRAM
                                                                   init + uninit
0001_0000                                          0001_0000

8000_0000                                          8000_0000         SDRAM
                                                                   init + uninit
9000_0000         FLASH                            9000_0000         FLASH
                “boot.asm”
                                                                   “boot.asm”
9000_0400          FLASH                           9000_0400         FLASH
            “initialized sections”                               “init sections”
9002_0000                                          9002_0000

               Boot-loader copies code/data from FLASH to IRAM/SDRAM
               When using the hardware boot, you do not have to relink your
                program with run/load addresses, HEX6x will take care of it for you
               Some code/data can still reside in flash
              Flash/Boot Procedure
1   Plan out your system‟s memory map – Before and After boot.

2   Modify .cdb, memory manager and do the following:
       Create necessary memory areas (e.g. BOOT)
       Direct the BIOS & compiler sections to their proper locations
        (when using the boot loader, these should be the runtime locations
         we have been using for all of our lab exercises)
Create Memory Objects (as needed)



                                 New




                  Memories listed in
                    our previous
                   memory-maps
              Flash/Boot Procedure
1   Plan out your system‟s memory map – Before and After boot.

2   Modify .cdb, memory manager and do the following:
       Create necessary memory areas (e.g. boot)
       Direct the BIOS & compiler sections to their proper locations

3   Create a user link.cmd file to specify boot.asm‟s load/run addr
User Linker Command File (link.cmd)
 SECTIONS
 {
     .boot_load :> BOOT
 }
              Flash/Boot Procedure
1   Plan out your system‟s memory map – Before and After boot.

2   Modify .cdb, memory manager and do the following:
       Create necessary memory areas (e.g. boot)
       Direct the BIOS & compiler sections to their proper locations

3   Create a user link.cmd file to specify boot.asm‟s load/run addr

4   Convert app.out to app.hex for Flash programming:
       Modify hex.cmd w/proper options
       Run hex6x to create .hex file
    Hex Conversion Utility (hex6x.exe)
                      hex.cmd
                                      app.hex

                                     ASCII-hex
           app.out     hex6x         Tektronix
                                     Intel MCS-86
                                     Motorola-S
                                     TI-tagged



   Converts a “.out” file into one of several hex formats
    suitable for loading into an EPROM programmer.
   Use:    hex6x filename.cmd

   Hex command file specifies options and filenames…


                                         What does hex.cmd look like?
      Hex Command File (Flash ROM)
c:\iw6000\labs\lab14a\debug\lab.out
-a
-image
-zero
-memwidth 8                                         Flash ROM
-map .\Debug\lab14hex.map             0x90000000        .boot_load
-boot
                                                        (boot.asm)
-bootorg 0x90000400
-bootsection .boot_load 0x90000000    0x90000400       COPY_TABLE

ROMS                                               Remaining Inititalized
{                                                       Sections
 FLASH: org = 0x90000000,             0x90040000
        len = 0x0040000,
        romwidth = 8,
        files = {.\Debug\lab14.hex}
}



                                            Click here to see the COPY_TABLE
              Flash/Boot Procedure
1   Plan out your system‟s memory map – Before and After boot.

2   Modify .cdb, memory manager and do the following:
       Create necessary memory areas (e.g. boot)
       Direct the BIOS & compiler sections to their proper locations

3   Create a user link.cmd file to specify boot.asm‟s load/run addr

4   Convert app.out to app.hex for Flash programming:
       Modify hex.cmd w/proper options
       Run hex6x to create .hex file

5   Start Flashburn and fill-in the blanks:
       hex cmd file
       hex image file
       FBTC file
       Origin & length of Flash
Using FlashBurn

                Flashburn saves
                 these settings to a
                 .CDD file
                Flash Burn Transfer
                 Controller (FBTC)
                When FBTC has been
                 downloaded to DSP
                 and is running,
                 FlashBurn is
                 “connected” to DSP
              Flash/Boot Procedure
1   Plan out your system‟s memory map – Before and After boot.

2   Modify .cdb, memory manager and do the following:
       Create necessary memory areas (e.g. boot)
       Direct the BIOS & compiler sections to their proper locations

3   Create a user link.cmd file to specify boot.asm‟s load/run addr

4   Convert app.out to app.hex for Flash programming:
       Modify hex.cmd w/proper options
       Run hex6x to create .hex file

5   Start Flashburn and fill-in the blanks:
       hex cmd file
       hex image file
       FBTC file
       Origin & length of Flash

6   Erase the FLASH
                                                                   What if you
                                                              want your image
7   Program FLASH, run, and debug ROM code                 in the host's ROM?
Putting the DSP Image on the Host
app.xml              ofd6x                app.out              Build



                                                                    Target
                      perl                          Host           System
                     script                         CPU
                                                                  Flash
                                                    RAM
                   appimage.c

   Use Object File Description (OFD6x) to
    create an XML description of the .out file                   C6x DSP
   Perl script uses XML to convert initialized                    RAM
    sections from .OUT file into a C
    description of the program’s image
   For more info refer to Using OFD Utility to Create a DSP Boot Image
    (SPRAA64.PDF)
            Outline
 Flow of events in the system
 Programming Flash
 Flash Programming Procedure
   Debugging ROM‟d code
                Debugging Your Application
    If your application has problems booting up or
     operating after boot, how do you debug it?
    Problem:
             Standard breakpoints (aka Software Breakpoints) cannot be
              used with program code residing in ROM-like memory.
             When using software breakpoints, CCS replaces the „marked‟
              instruction with an emulation-halt instruction. This cannot be
              done in ROM-like memory.

   Solutions:
    1. Use Hardware breakpoints to help locate the problem.
              To debug ROM program, it‟s especially important to put a
               H/W breakpoint at the start of your program, otherwise you
               won‟t be able to halt the code in time to see what executing.
    2. Create a “stop condition” (infinite loop) in your boot code.
       When the code stops, open CCS and load the symbol table.
        Some Helpful Hints (that caught us)
   When you (try to) boot your application for the first time, your
    system may not work as expected. Here are a couple tips:
       A GEL file runs each time you invoke CCS. This routine
        performs a number of system initialization tasks (such as
        setting up the EMIF, etc.). These MUST now be done by your
        boot routine.
       Upon delivery, the DSK‟s POST routine is located in its Flash
        memory and runs each time you power up the DSK. To
        perform its tests, it will initialize parts of the system (e.g.
        EMIF, codec, DMA, SP, etc). When you reprogram the Flash
        with your code (and boot routine), you will need to initialize
        any components that will be used.
   Bottom line, it‟s easy to have your code working while in the
    “debug” mode we mentioned earlier, then have it stop working
    after Flashing the program. Often, this happens when some
    components don‟t get initilized properly.
            Outline
   Flow of events in the system
   Programming Flash
   Flash Programming Procedure
   Debugging ROM‟d code
Using Chip Support Library
             Outline
   Chip Support Library (CSL)
   Programming EDMA with CSL
   CSL‟s _FMK macro (field make)
   Source Insight
Chip Support Library                              CSL Module   Description
                                                   Cache        Cache & internal memory
    C-callable library that supports              CHIP         Specifies device type
     programming of on-chip peripherals            CSL          CSL initialization function
    Supports peripherals in three ways:           DAT          Simple block data move
                                                   DMA          DMA (for „0x devices)
       1.   Resource Management                    EDMA         Enhanced DMA (for „1x dev)
            (functions)                            EMIF         External Memory I/F
              Verify if periph is available       EMIFA
              “Check-out” a peripheral
                                                                C64x EMIF‟s
                                                   EMIFB
       2.   Simplifies Configuration               GPIO         General Purpose Bit I/O
                                                   HPI          Host Port Interface
             Data structures
                                                   I2C          I2C Bus Interface
             Config functions
                                                   IRQ          Hardware Interrupts
       3.   Macros improve code readability        McASP        Audio Serial Port
                                                   McBSP        Buffered Serial Port
    You still have to know what you want          PCI          PCI Interface
     the peripherals to do, CSL just               PLL          Phase Lock Loop
     simplifies the code and maintenance           PWR          Power Down Modes
                                                   TCP          Turbo Co-Processor
                                                   TIMER        On-chip Timers
                                                   UTOPIA       Utopia Port (ATM)
    The best way to understand CSL                 VCP          Viterbi Co-Processor
                    is to look at an example...    XBUS         eXpansion Bus
1. Include Header Files
       Library and individual module header files
                                                    General Procedure
                                                        for using CSL
   




                  1. #include <csl.h>
                     #include <csl_timer.h>
   Timer
Example:
1. Include Header Files
        Library and individual module header files
                                                     General Procedure
                                                         for using CSL
    

2. Declare Handle
    For periph’s with multiple resources




                   1. #include <csl.h>
                      #include <csl_timer.h>
   Timer           2. TIMER_Handle myHandle;
Example:
1. Include Header Files
    Library and individual module header files
                                                  General Procedure
2. Declare Handle
                                                      for using CSL
    For periph’s with multiple resources

3. Define Configuration
    Create variable of configuration values




                 1. #include <csl.h>
                    #include <csl_timer.h>

   Timer         2. TIMER_Handle myHandle;
                 3. TIMER_Config myConfig = {control, period, counter};
Example:
1. Include Header Files
        Library and individual module header files
                                                     General Procedure
                                                         for using CSL
    

2. Declare Handle
    For periph’s with multiple resources

3. Define Configuration
    Create variable of configuration values

4. Open peripheral
    Reserves resource; returns handle




                   1. #include <csl.h>
                      #include <csl_timer.h>

   Timer           2. TIMER_Handle myHandle;
                   3. TIMER_Config myConfig = {control, period, counter};
Example:
                   4. myHandle = TIMER_open(TIMER_DEVANY, ...);
1. Include Header Files
        Library and individual module header files
                                                     General Procedure
                                                         for using CSL
    

2. Declare Handle
    For periph’s with multiple resources

3. Define Configuration
    Create variable of configuration values

4. Open peripheral
    Reserves resource; returns handle

5. Configure peripheral
    Applies your configuration to peripheral


                   1. #include <csl.h>
                      #include <csl_timer.h>

   Timer           2. TIMER_Handle myHandle;
                   3. TIMER_Config myConfig = {control, period, counter};
Example:
                   4. myHandle = TIMER_open(TIMER_DEVANY, ...);
                   5. TIMER_config(myHandle, &myConfig);
             Outline
 Chip Support Library (CSL)
   Programming EDMA with CSL
   CSL‟s _FMK macro (field make)
   Source Insight
      Programming the EDMA

   There are three methods available
    for programming the EDMA:
    (1) Writing directly to the EDMA
        registers.
    (2) Using the Chip Support Library
        (CSL).
    (3) Graphically using the DSP/BIOS GUI
        interface.
Programming the EDMA - Direct

(1) Writing directly to the EDMA registers:
       Although this method is straightforward, it
        relies on a good understanding of the EDMA
        and the DSP memory map.
       This method is tedious and prone to errors.

        #include <intr.h>
        #include <regs.h>
        #include <c6211dsk.h>


        void EDMA_setup (void)
        {
                *(unsigned volatile int *) ECR = 0xffff;
                *(unsigned volatile int *) EER = 0xffff;
                *(unsigned volatile int *) CIPR = 0xffff;
                *(unsigned volatile int *) CIER = 0xffff;
                ...
        }
  Programming the EDMA - CSL

(2) Using the Chip Support Library:
      The CSL provides a C language interface for
       configuring and controlling the on-chip
       peripherals, in this case the EDMA.
      The library is modular with each module
       corresponding to a specific peripheral. This
       has the advantage of reducing the code size.
      Some modules rely on other modules also
       being included, for example the IRQ module is
       required when using the EDMA module.
Programming the EDMA - CSL Example
Programming the EDMA - CSL Example

     CSL programming procedure:
      (1) Create handles for the EDMA channel
          and reload parameters:
          EDMA_Handle hEdma;


      (2) Create the EDMA configuration:
          EDMA_Config cfgEdma;
Programming the EDMA - CSL Example

     CSL programming procedure (cont):
      (3) Create the configuration structures
          for the ping and pong channels:
          EDMA_Config cfgEdmaPong = {0x28720002,
                                         EDMA_SRC_OF(McBSP0_DRR),
                                         EDMA_CNT_OF(BUFF_SZ),
                                         EDMA_DST_OF((unsigned int)cin_data),
                                         EDMA_IDX_OF(0x00000004),
                                         EDMA_RLD_OF(0x00000000)};
          EDMA_Config cfgEdmaPing = {0x28720002,
                                         EDMA_SRC_OF(McBSP0_DRR),
                                         EDMA_CNT_OF(BUFF_SZ),
                                         EDMA_DST_OF((unsigned int)in_data),
                                         EDMA_IDX_OF(0x00000004),
                                         EDMA_RLD_OF(0x00000000)};
Programming the EDMA - CSL Example

     CSL programming procedure (cont):
      (4) Map the event to a physical interrupt (see
          Interrupt section):
           IRQ_map (IRQ_EVT_EDMAINT, 8);

          This maps the EDMA_INT interrupt to CPU_INT8.
      (5) Set the interrupt dispatcher configuration
          structure (see Interrupt section):
           IRQ_configArgs (IRQ_EVT_EDMAINT,
                           EdmaIsr,
                           0x00000000,
                           IRQ_CCMASK_DEFAULT,
                           IRQ_IEMASK_ALL);
Programming the EDMA - CSL Example

     CSL programming procedure (cont):
      (6) Open up an EDMA channel associated with
          the Timer 1 (remember each EDMA is
          associated with a specific event):
           hEdma = EDMA_open (EDMA_CHA_TINT1, EDMA_OPEN_RESET);

      (7) Allocate the EDMA reload parameters:
           hEdmaPing = EDMA_allocTable (-1);
           hEdmaPong = EDMA_allocTable (-1);

          Note: -1 means allocate at any available
          location.
      (8) Copy the first reload configuration structure
          to the EDMA configuration structure:
           cfgEdma = cfgEdmaPing;
Programming the EDMA - CSL Example

     CSL programming procedure (cont):
      (9)Configure the link fields of the configuration
          structure:
           cfgEdmaPing.rld = EDMA_RLD_RMK(0,hEdmaPong);
           cfgEdmaPong.rld = EDMA_RLD_RMK(0,hEdmaPing);
           cfgEdma.rld     = EDMA_RLD_RMK(0,hEdmaPong);

          This can be done at stage 3 but in this way we do not
          know the numerical value of the reload address.
      (10) Setup the EDMA channel using the
           configuration structure:
           EDMA_config (hEdmaPing, &cfgEdmaPing);
           EDMA_config (hEdmaPong, &cfgEdmaPong);
Programming the EDMA - CSL Example

     CSL programming procedure (cont):
      (11) Finally initialise all the EDMA registers:
        EDMA_RSET (ECR, 0xffff);     // clear all events
        EDMA_enableChannel(hEdma);
        EDMA_RSET (EER, 0x4);        // set the timer 1 event enable bit
        EDMA_RSET (CIPR, 0xffff);
        EDMA_RSET (CIER, 0x4);       // make the timer 1 event generate
                                     // an EDMA_INT interrupt
Programming the EDMA - DSP/BIOS GUI

  (3) DSP/BIOS GUI Interface
        With this method the configuration
         structure is created graphically and the
         setup code is generated automatically.
Programming the EDMA - DSP/BIOS GUI

     Procedure:
      (1) Create a configuration
          using the EDMA
          configuration manager.
Programming the EDMA - DSP/BIOS GUI
     Procedure:
      (2) Right click and select “Properties”, see the
          figure below, and then select “Advanced” and
          fill all parameters as shown below.
Programming the EDMA - DSP/BIOS GUI

     Procedure:
      (3) If you are using symbolic parameters
          such as “in_data” you need to declare
          it in the “CSL Extern Declaration”, see
          below figure.
Programming the EDMA - DSP/BIOS GUI

     Procedure:
      (4) A file is then generated that contains
          the configuration code. The file
          generated for this example is shown
          on the next slide.
Programming the EDMA - DSP/BIOS GUI
    /*   Do *not* directly modify this file. It was    */
    /*   generated by the Configuration Tool; any */
    /*   changes risk being overwritten.               */

    /* INPUT edma_inout_csl.cdb */

    /* Include Header File */
    #include "edma_inout_cslcfg.h"

    extern far Uint16 McBSP0_DRR;
    extern far Uint16 in_data[];
    extern far Uint16 BUFF_SZ;

    /* Config Structures */
    EDMA_Config cfgEdmaPing = {
        0x28720002,        /* Option */
        0x018C0000,        /* Source Address - Numeric   */
        0x00000002,        /* Transfer Counter */
        (Uint32) in_data, /* Destination Address - Symbolic    */
        0x00000004,        /* Transfer Index */
        0x000001B0         /* Element Count Reload and Link Address   */
    };

    /*   Handles   */

    /*
      * ======== CSL_cfgInit() ========
      */
    void CSL_cfgInit()
    {
    }
             Outline
 Chip Support Library (CSL)
 Programming EDMA with CSL
   CSL‟s _FMK macro (field make)
   Source Insight
   CSL‟s _FMK macro (field make)
EDMA Options Register
                    TCC
                   19 16
                              << 16     0011
                                      gTCC=3
 EDMA_FMK(OPT, TCC, gTCC) = 0x00030000
Peripheral   Register Field   Value
             Outline
 Chip Support Library (CSL)
 Programming EDMA with CSL
 CSL‟s _FMK macro (field make)
   Source Insight
Source Insight (1)
Source Insight (2)
             Outline
   Chip Support Library (CSL)
   Programming EDMA with CSL
   CSL‟s _FMK macro (field make)
   Source Insight
Using DSP/BIOS
Part 1 - Introduction
         Learning Objectives

   Introduce DSP/BIOS and its
    components.
   Introduce the software tools for
    managing DSP/BIOS components
    and objects.
   Run some examples.
                  DSP/BIOS

   The DSP/BIOS is an operating system
    that can provide:
       A graphical interface for static system
        setup.
       Real-time scheduling.
       Real-time analysis (RTA).
       Real-time data exchange (RTDX).
        DSP/BIOS Components




   The user writes code („C‟/assembly) using
    the DSP/BIOS library.
   The user can use the configuration tools to
    setup the system.
   All the files generated constitute a project.
       DSP/BIOS Components




   The project is then compiled, assembled and
    linked by the code generation tools in order
    to generate an executable file (*.out).
   There are also some DSP/BIOS plug-ins that
    can be used, for instance, as program test
    while the target is running.
       DSP/BIOS Components




   Code composer simulator/debugger and the
    host emulator support are also part of the
    code composer studio.
   The host and target communicate through
    the JTAG (Joint Test Action Group)
    connection (ssya002c.pdf).
Graphical Interface for Static System
                Setup
   Static system setup is performed using
    the DSP/BIOS GUI configuration tool.
   The configuration tool has an interface
    similar to windows explorer.
   It lets you:
        Specify a wide range of parameters used
         by the DSP/BIOS real-time library.
        Create run-time objects that are used by
         the target application‟s DSP/BIOS API
         calls.
 Note: API: Application Programming Interface
Graphical Interface for Static System
                Setup
   The DSP/BIOS main objects are:
    (1) Hardware interrupts (HWI).
    (2) Software interrupts (SWI).
    (3) Tasks (TSK, IDL).
    (4) Data and I/O streams (RTDX, SIO, PIP,
        HST).
    (5) Synchronisation and Communication
        (SEM, MBX, LCK).
    (6) Timing (PRD, CLK).
    (7) Logging and statistics (LOG, STS, TRC).
Graphical Interface for Static System
                Setup
   Files used to create the DSP/BIOS
    program:
       The abbreviation 62 is used for the
        C6000 processors.




                    Programs/Files generated by
                    the configuration manager


                    Programs generated by the
                    user
Part 2 - Real Time Scheduling
         Learning Objectives

   What is a real-time scheduler?
   Why do we need a real-time
    scheduler?
   DSP/BIOS Thread Types.
   Example.
              Real-time scheduling

   Before embarking into real-time scheduling
    let us first state the problem:
     main ()
     {
               for (;;);
     }
     ISR1()
     {
               algorithm1();
     }
     ISR2()
     {
               algorithm2();
     }


   Once ISR1 or 2 is called, algorithm 1 or 2
    runs to completion. Can this cause a
    problem?
              Real-time scheduling

   Before embarking into real-time scheduling
    let us first state the problem:
     main ()
     {                         There is no guarantee of meeting the
               for (;;);
                               real-time deadlines because:
     }
     ISR1()                    (1) The algorithms can run at
     {
                                    different rates.
               algorithm1();   (2) One algorithm can overshadow
     }                              the other.
     ISR2()                    (3) The timing can be non-
     {                              deterministic.
               algorithm2();
                               etc.
     }


   Once ISR1 or ISR2 is called, algorithm 1 or
    2 runs to completion. Can this cause a
    problem?
          Real-time scheduling

   The answer depends on the
    application.
   If we want to process two algorithms
    in real-time then we have to answer
    the following questions:
       Are ISR1 and ISR2 synchronised? If yes, then
        we can use only an ISR that processes both
        algorithms (assuming that we have enough
        processing power to complete algorithm 1 and
        2 on time).
       What happens if the algorithms are not
        synchronised?
       Which algorithm has a higher priority?
       Can the algorithm of lower priority be pre-
        empted (stopped)?
            Real-time scheduling

   Example: Simple application.
   System description:
        Algorithm 1 and 2 are not synchronised.
        Assume algorithm 1 has the highest priority.
        Algorithm 2 can be pended.
                  CPU processing        MISSED!
                    Algorithm 1


    Algorithm 1
    Algorithm 2
                                   CPU processing
                                     Algorithm 2


   Remember: there is only one CPU and
    therefore only one algorithm can be
    processed at a time.
           Real-time scheduling

   Example: Simple application.
   Solution 1: Algorithm decomposition:
        The algorithm can be decomposed into sub-
         functions:
              algorithm2 ();         function1();
                                     function2();
                                     function3();


        When the CPU is not processing algorithm1 it
         can process one of the sub-functions (to
         completion) as shown:
    Algorithm 1
    Algorithm 2
                         function1      function2   function3
           Real-time scheduling

   Example: Simple application.
   Problems with this solution:
       Difficult to write (as timing is critical).
       Difficult to change (what happens if
        algorithm is modified or another
        algorithm is added).
          Real-time scheduling

   Example: Simple application.
   Solution 2: Using an operating system
    Advantages:
     Easy to write (algorithms are written
      independently).
     Easy to maintain or change (operating
      system takes care of the scheduling).
     Enables fast time to market.

   Which operating system? Depends on:
       The processor being used.
       The DSP platform (single/multi
        processors).
Real-time scheduling: DSP/BIOS

   For all TI DSPs there is a DSP/BIOS
    operating system which includes:
       Small sized real-time library.
       An API for using the library services.
       Easy-to-use configuration tools.
       Real-time analysis programs.
   DSP/BIOS scheduling solution
    provides:
       Fixed-priority preemptive scheduler.
       Multiple thread types.
Real-time scheduling: Terminology
No preemption: Resources cannot be preempted; which means that the
     only way of releasing a resource is by the process of holding it.
Object: Term for data and code structures provided by DSP/BIOS, e.g.
     an event, task, semaphore.
Pend: Wait for an event Resource preemption: Release of a resource.
Post: Signal an event, e.g. post a software interrupt, that is make a
     software interrupt ready.
Preemption: A higher priority function (or thread) interrupts other
     functions (or threads) of lower priority.
Priority scheduling: Priority scheduling can be either preemptive or non-
     preemptive. A preemptive priority scheduling algorithm will
     preempt (release) the CPU if another process of higher priority
     arrives.
Process: A task or thread of execution.
Scheduler: System software to manage the execution of threads.
Scheduling: The planning used to share a resource.
Semaphore: Synchronisation system object that enables tasks to
     synchronise their activities.
Thread: An independent function.
               DSP/BIOS Thread Types
                  HWI               HWI priorities set by hardware
           Hardware Interrupts       One ISR per interrupt.

                  SWI               14 SWI priority levels
Priority




           Software Interrupts       Multiple SWIs at each level.

                  TSK               15 TSK priority levels
                 Tasks               Multiple TSKs at each level.

                  IDL               Multiple IDL functions
              Background             Continuous loop.

                   HWI triggered by hardware interrupt.
                   IDL runs as the background thread.
                   What causes a SWI or TSK to run?
       Triggering SWI or TSK
                   SWI_post                    SEM_post
SWI                           TSK
           start

                                  SEM_pend        block
            “run to
                                         start
            completion”




           end                           end

  SWI cannot pend.            TSK only returns when no
  SWI always returns          longer needed, otherwise
  from function.              normally an infinite loop.
Considerations in Selecting Thread
             Types
   Thread latency and data rates.
   Multi-tiered response to interrupts:
       HWI is fast (for sample-by-sample response
        time).
       SWI is slower (triggered to process frame).
   Priority of thread.
   Stack needs:
       O.K. to share system stack? then use SWI.
       Need private stack? then use TSK.
   Synchronization and communication
    methods:
       SWI and TSK have different methods.
   User preference or ease-of-use.
         Thread Preemption Example
                     post        post                    post                post
                          return swi2 return            sem2 return
                     swi1                                                    swi2 return
HWI                                                                                  post post
                                          return                                    sem1 sem2

SWI 2                                                                                       return
                                               return

SWI 1       pend                                                 pend                       pend
            sem2                                                 sem2                       sem2
                              interrupt
TSK 2                                                                 pend                       pend
                                                                      sem1                       sem1

TSK 1
                  interrupt                        interrupt
main()
         return
IDL
                                                                        interrupt

                                          Events over time
Part 3 - Real Time Analysis Tools
         Learning Objectives

   Introduction to the analysis tools.
   Using the LOG module.
   Using the STS module.
   Defining DSP/BIOS objects using
    the configuration tools.
   Example.
               Introduction
   Traditionally analysis was performed by
    halting the processor and examining
    variables or memory.
   This traditional method is invasive and
    does not represent the reality of real-time
    issues.
   Real-time analysis is the analysis of data
    acquired during real-time operation of a
    system without having to stop or interfere
    with the target.
   The API‟s and Plug-ins provided with
    DSP/BIOS enable the programmer to
    monitor data while the target is running.
                Introduction

   So how can data be monitored
    without stopping the target?
       Target-host communications is
        performed in the background (IDL)
        thread (e.g. the CPU is performing
        NOPs or waiting for an interrupt).
       Data formatting is done by the host
        and therefore releases the CPU to
        perform useful tasks.
                 DSP/BIOS - API Modules
                                                 Comm/Synch between threads
Instrumentation/Real-Time Analysis
                                                 SEM   Semaphores manager
LOG    Message Log manger                        MBX   Mailboxes manager
STS    Statistics accumulator manager            LCK   Resource lock manager
TRC    Trace manager
                                                 Input/Output
RTDX   Real-Time Data Exchange manager
                                                 PIP   Data pipe manager
Thread Types
                                                 HST   Host input/output manager
HWI    Hardware interrupt manager                SIO   Stream I/O manager
SWI    Software interrupt manager                DEV   Device driver interface
TSK    Multitasking manager
                                                 Memory and Low-level Primitives
IDL    Idle function & processing loop manager
                                                 MEM   Memory manager
Clock and Periodic Functions
                                                 SYS   System services manager
CLK    System clock manager                      QUE   Queue manager
PRD    Periodic function manger                  ATM   Atomic functions
                                                 GBL   Global setting manager
                     LOG Module

   The LOG module contains functions that
    can be used to capture events in Real-Time
    while the target program is running.
   Functions in LOG module:
     (1) LOG_disable( ):   Disable the system log
     (2) LOG_enable( ):    Enable the system log
     (3) LOG_error( ):     Write a user error event to the system
                           log
     (4)   LOG_event( ):   Append unformatted message to a
                           message log
     (5)   LOG_message( ): Write a user message to the system
                           log
     (6)   LOG_printf( ):  Append a formatted message to a
                           message log
     (7)   LOG_reset( ):   Reset the system log
Moving from “printf” to the faster
         “LOG_printf”

   How many cycles does the printf()
    function require?
                 > 34000
 Moving from “printf” to the faster
          “LOG_printf”
(1) Include the following headers in the C file:
    /* #include <stdio.h>   NOT required */
    #include <std.h>   /* this is required by all DSP/BIOS modules */
    #include <log.h>   /* this is required by the LOG module */


(2) Include the following external reference to the
    DSP/BIOS object in the C code:
    extern far LOG_Obj fastprint;   /*fastprint is a user chosen name */
 Moving from “printf” to the faster
          “LOG_printf”
(3) Create a LOG object using the configuration
    tool:
   (a) Open the cdb file, select instrumentation and
       open the “LOG - Event Log Manager”.
   (b) Create a new object, call it “fastprint” and
       change its properties as shown below:
 Moving from “printf” to the faster
          “LOG_printf”
(4) Use the following code when using the
    LOG_printf function:

    /* #include <stdio.h>     NOT required */
    #include <std.h> /* this is required by all DSP/BIOS modules */
    #include <log.h> /* this is required by the LOG module */


    extern far LOG_Obj fastprint;


    void algorithm_1 (void)
    {
         LOG_printf (&fastprint, “Algorithm 1 is running\n”);
    }
 Moving from “printf” to the faster
          “LOG_printf”
(5) To visualise the output of the fastprint log you
    must open the Message Log window, see
    below:
                   STS Module

   The STS module manages objects
    called statistics accumulators.
   Each STS object accumulates the
    following information:
        Count:       The number of values
        Total:       The sum of count values
        Maximum:     The longest value encountered
   Functions in the STS Module:
     (1) STS_add( ): Update statistics using provided value
     (2) STS_delta( ): Update statistics using the difference
         between the provided value and the set point
     (3) STS_reset( ): Reset the values stored in the STS object
     (4) STS_set( ):   Save a setpoint value
          Using the STS Module

(1) Include the following headers in the C file:
    /* #include <stdio.h>     NOT required */
    #include <std.h>      /* this is required by all DSP/BIOS modules */
    /* #include <sts.h>    : Created by the tools    */

(2) Create an object with the configuration tool:
    (a) Open the cdb file, select “Instrumentation”
    and open the “STS - Statistics Object
    Manager”.
    (b) Create a new object and call it “mystsObj”.
          Using the STS Module

(3) You can use the following code to benchmark
    the printf function:
    #include <stdio.h>   /* Needed for the printf function */
    #include <std.h> /* this is required by all DSP/BIOS modules */
    #include <sts.h>
    #include <clk.h>


    extern far STS_Obj mystsObj;


    void algorithm_1 (void)
    {
         STS_set (&mystsObj, CLK_gethtime());
         printf (“Algorithm 1 is running\n”);
         STS_delta (&mystsObj, CLK_gethtime());
    }
 Moving from “printf” to the faster
          “LOG_printf”
(4) To visualise the statistics, open the statistics
    window as shown below:




(5) Exercise: Compare the number of cycles the
    printf and LOG_printf take.
    Low Instrumentation Overhead

LOG, STS and TRC module operations are very
fast and execute in constant time, as shown in the
following list:

   LOG_printf and LOG_event:       approx 32 cycles
   STS_add:                        approx 18 cycles
   STS_delta:                      approx 21 cycles
   TRC_enable and TRC disable:     approx 6 cycles


Each STS object uses only four words of data memory.
This means that the host transfers only four words to
upload data from a statistics object.
Profiler
            Outline
   Benchmark Code Performance
   Thinking About the Result
Benchmark Code Performance (1)
Benchmark Code Performance (2)
Benchmark Code Performance (2)
Benchmark Code Performance (3)
Benchmark Code Performance (4)
Benchmark Code Performance (5)
             Outline
 Benchmark Code Performance
   Thinking About the Result
     Thinking About the Result
   How May CPU Cycles Does the Function
    Cost?
   How May MMAC Can C64x Core Do?
   Bad Performance?
   Was the Method Right for Benchmark?
   How to Solve It?

				
DOCUMENT INFO
Shared By:
Categories:
Tags:
Stats:
views:41
posted:11/14/2011
language:English
pages:195