N-Bit Serial Adder Design
Objective: The purpose of this experiment is to give students an exposure to a "system"
design using shift registers and a simple logic controller including a sequential full-adder
Equipment: One standard Logic Lab Kit and TTL chips (7495 ICs or equivalent, other
ICs as required).
1.0 Complete the design of the circuit shown in Figure 1.1 for the bit size N
specified by your instructor.
2.0 Assemble and test your circuit implementation. If your circuit is operating
properly, a valid sum should appear on the A-register lamps at the end of N
clock pulses. The B-register should be empty.
3.0 Use your circuit to perform various adding and/or subtracting problems to
verify proper circuit operation. Remember that subtraction can be performed
with an adder circuit by using one's or two's complement arithmetic.
4.0 When you have your circuit designed and operating properly, have your
instructor sign below.
5.0 Write a formal laboratory report using the format specified in class. Show
your logic diagram in your report.
Clock C D Q
Y z(t) z(t+1)