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Radiation Tests of TGC Electronics



Ryo Ichimiya

(On behalf of TGC electronics group)









Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 1

Introduction

 We have to check every electronics components using in

UX15 according to the ATLAS Standard Test Method(by

RHAWG)...

 Almost devices we use are made with CMOS technology,

which are naturally tolerant to displacement damage

(produced by neutron in the semiconductor).

 Effects to semiconductors for irradiation:

 Total Ionizing Doze(TID) Evaluate by gamma-ray(60Co)

 Ionizing damage induced by electron/hole-pair is dominant for

TGC Electronics.

 Non Ionizing Energy Loss(NIEL, neutron) Only for Bipolar device

 Single Event Effect (SEE) Evaluate by proton

beam(>60MeV)

 SEE rate are not evaluated in terms of a time or dose(Probability

phenomenon). A probability that an SEE will occur can be measured as a

SEE cross section. (Unit: [/20MeV hadron /cm2], or [bit/20MeV hadron

/cm2]) Radiation Tests of TGC Electronics,

2004/1/27  It consists of SEU(Flip-Flop Upset), SEL(Latch-Up), SEB(Burn-Out),...2

R. Ichimiya

TGC Trigger / Readout system









PS-Pack

HSC Crate

Off-detector(USA15)

On-detector (UX15)Radiation TestsIchimiya Electronics,

2004/1/27 R.

of TGC

3

TGC Trigger / Readout system









PS-Pack

ASIC HSC Crate

Off-detector(USA15)

On-detector (UX15)Radiation TestsIchimiya Electronics,

2004/1/27 R.

of TGC

4

TGC Trigger / Readout system









PS-Pack

ASIC FPGA(Anti-fuse) HSC Crate

Off-detector(USA15)

On-detector (UX15)Radiation TestsIchimiya Electronics,

2004/1/27 R.

of TGC

5

TGC Trigger / Readout system

LVDS link









PS-Pack

ASIC FPGA(Anti-fuse) HSC Crate

Off-detector(USA15)

On-detector (UX15)Radiation TestsIchimiya Electronics,

2004/1/27 R.

of TGC

6

TGC Trigger / Readout system

LVDS link

G-link









PS-Pack

ASIC FPGA(Anti-fuse) HSC Crate

Off-detector(USA15)

On-detector (UX15)Radiation TestsIchimiya Electronics,

2004/1/27 R.

of TGC

7

Devices under Test

 Irradiated devices (to be used in TGC-electronics)



 ASD ASIC Bipolar, SONY

 PP ASIC 0.35um CMOS, ROHM

 SLB ASIC 0.35um CMOS, ROHM

 HPT ASIC 0.35um CMOS, HITACHI

 Anti-fuse FPGA (Actel, SX-A) JRC, HSC, VME-protocol

 Anti-fuse FPGA (Actel, Acceralator) SSW

 Serial Link IC (LVDS Ser./Des., G-Link) connect between each station

 Other COTS devices(e.g. 74 series logic IC, Reset, charge pump, X’tal)









Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 8

Total Ionizing Doze(TID)

Ionization Radiation









TGC-Electronics

position

Max SRLtid



0.34[krad/10y

]



SF(x70)



23.8[krad/10y

Interaction Point Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya ] 9

Single Event Effect (SEE) >20MeV hadron fluence

Charged Particle









TGC-

Electronics

position

Max SRLSEE

2.8E10

[h/10y]



SF(x20)



Interaction Point

2004/1/27

Radiation Tests of TGC Electronics,

R. Ichimiya

5.6E11 10

γ-ray Irradiation Test

(RCNST@U-Tokyo)

 TID Evaluation with γ-ray

 γ-ray from 60Co (1.1, 1.3MeV)

 Appling voltage and signals

from experiment room, the

DUT was irradiated in

operation.

 Irradiated more than the

simulated doze times safety

factor(SF), typically 30krad.

 4 samples/device.

 Measurement Item

 function check, characteristics

(tpd, Freq.), consumption

Irradiation

Experiment current.

room

room  We measure them at before,

Irradiation setup at, after each irradiation.

Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 11

γ-ray Irradiation Test (contd.)

(RCNST@U-Tokyo)

Patch-Panel ASIC

 One Result:

Patch-Panel ASIC

Current(mA)













50krad

(0.35mm CMOS, ROHM)

50krad

30krad

30krad  Current is almost flat

until 50krad.

 VCO(control voltage of

00 200

20 400

40 600

60 800

80 1000

100 DLL; smaller value

Absorbed Dose(Gray)

Absorbed Dose(krad) means the transistor

Patch-Panel ASIC operates faster.) is also

almost no change until

30krad.

VCO Voltage(V)

VCON(V)









 After irradiation, all IC

operates normally.

 Also, SLB-ASIC employs

the same CMOS process.

0

0 200 400 600 800 1000

20 40 60 80 100

Absorbed Dose(Gray)

AbsorbedDose(krad)

Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 12

γ-ray Irradiation Test (contd.)

(RCNST@U-Tokyo)

 Irradiated devices (to be used in TGC-electronics)

 ASD ASIC Bipolar, SONY

 PP ASIC 0.35um CMOS, ROHM

 SLB ASIC 0.35um CMOS, ROHM

 HPT ASIC 0.35um CMOS, HITACHI

 Anti-fuse FPGA (Actel, SX-A) JRC, HSC, VME-protocol

 Anti-fuse FPGA (Actel, Acceralator) SSW

 Serial Link IC (LVDS Ser./Des., G-Link) connect between each station

 Other COTS devices(e.g. 74 series logic IC, Reset, DCDC, X’tal)

 Irradiation tests of all devices to be used has been done in

last December, and we found there’s no problem to use in

ATLAS environment (>10years).

 In other word, we excluded using some devices according to irradiation

test, like CPLD and Flush memory.



Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 13

proton Irradiation Test

(CYRIC@Tohoku-U)

 Single Event Effect

→evaluate with proton beam

 E(proton) = 70MeV

 I = 0.5nA~5nA

 => 107~108 p/cm2/s

 Integrated proton flux

(=fluence) was calculated

by foil(Cu) activation

method, using Ge detector

and Imaging Plate(2D γ-

sensor).

 2 samples/device

 Remote controls via 10base-2

network (Win-PC, Linux-PC,

Camera, XY-Stage, etc)



Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 14

proton Irradiation Test (contd.)

(CYRIC@Tohoku-U)

DC Power G-Link Board



TX RX Beam End



OE/EO

Converter

Cu Foil ZnS

(25mm sq, 0.15mm)



G-Link Board

Optical Fiber



Control

(LVDS) Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 15

proton Irradiation Test (contd.)

(CYRIC@Tohoku-U)

 Proton Beam Fluence measurement

 Cupper foil(25mm sq., 0.15mm thickness)attached to the

DUT was activated by proton beam.

 After Irradiation, number of photons were counted by

Ge-detector. Then, the proton fluence was calculated

with cross-section data (radioactive nuclei production).

Set Cu foil









Ge-detector head

is in Pb shield

Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 16

proton Irradiation Test (contd.)

(CYRIC@Tohoku-U)

 Profile measurement

 Proton fluence calculated from Ge-detecor is average value for all

cupper regions.

 So, we have to measure the proton profile to determine the

fluence at the IC’s die position (~5mm sq.).

 Dispose cupper foils on Imaging Plate as they were irradiated. Then

scan the radiation image by the IP reader.

 Imaging plate contains photostimulable BaFBr:Eu2+. The absorbed radiation intensity can be

read out by applying LASER beam point-by-point.









Scan Intensity profile

Dispose the IP

Radiation Tests of TGC

2004/1/27 Electronics, R. Ichimiya 17

proton Irradiation Test (contd.)

(CYRIC@Tohoku-U)

D Q

 SEU cross-section of Rohm 0.35mm process

measured by proton irradiation to JRC ASIC:

Total Fluence(1/cm2) 6.29*1012

CLK

Cross Section(cm2/bit) 2.8*10-14 Majority Logic

(Voting Logic, TMR)

 SEU rate for whole TGC electronics system,

without Majority Logic:

Register bits

in a chip

Chip number used SEU rate in SEU rate is low enough.

in the TGC system a day

So, we can make them

PP 95 ~10000 1 completely negligible

SLB 3007 ~3000 17.5 ones with using majority

JRC(* 7 ~1500 0.02 logic.

)

(*) In current design, we plan to adopt Anti-Fuse FPGA.

Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 18

proton Irradiation Test (contd.)

(CYRIC@Tohoku-U)

 LVDS Serial Link IC (10bit Ser./Des.)

 Time distribution of Serial Link Error:

Texas Instruments -

TexasInstruments - Rx Rx

15





10









count

count

5

failure

故障

0 min

min

10 20 30

120krad

National Semiconductor’s one made SEU・Link error continuously,

but did not died.

Texas Instrument‘s one made SEU・Link error hardly, but died

about dosed 120krad.(>>30krad !!)

Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 19

proton Irradiation Test (contd.)

(CYRIC@Tohoku-U)

 G-Link (Agilent, HDMP-1032, 1034)

 Serial Link IC used in data transmission from UX15 to USA15 via optical fiber.

 Jast irradiated one weak ago!!!(20-Jan.), under study. Very Preliminary!!!

 Each chip was irradiated about ~3 x 1011 p/cm2 (corresponds 100 years in ATLAS

experiment [without Safety Factor])

 The number used in TGC is about 1000 link.

note: Almost G-Link chips are TX which will be located in UX15.

TX1 TX2 RX1 RX2 Impact(TX)

Effective irradiation time

31min. 30min. 30min. 30min.

# link loss 30 47 73 89 ~5errors/day

Mean time of

Self-Link recover(ms) 7.1 8.2 7.1 8.6

# data error 156 227 512 278 ~50errors/day

# flag error 2224 2384 912 1100

Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 20

proton Irradiation Test (contd.)

(CYRIC@Tohoku-U)

 Anti-fuse FPGA (Actel, SX-A(A54SX32A)) JRC, HSC, VME-protocol

 Medium size FPGA (up to 72Kgates), very cheap (~12CHF@08A -F)

 Implement 1024bit shift register (256bit x4) to observe the SEUs.

 With 2.6 x 1012 p/cm2, #SEU=0.

 Hence, s(SEU)<1.5 x 10-15 cm2/bit (*)

 SEUrate<2 [SEU/day/TGC system] Preliminary value

 It assumes Register: 1024bit, #FPGA:2700.



(*) 95% confidence limit.

dout[3:0]





256 stages







Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 21

proton Irradiation Test (contd.)

(CYRIC@Tohoku-U)

 Anti-fuse FPGA (Actel, Axcelerator(TM)(AX250)) SSW



 Big FPGA (up to 2Mgates) will

be used for Star Switch module.

 It contains embedded Memory

(55,296bits) other than SX-A’s one.

 Just irradiated 1 weak ago.

 Some SEU were observed for

~100krad irradiation.

After irradiation, no DUT was

failure.

SEUrate~80

[SEU(mem)/day/system]

SEUrate~0.9 [SEU(reg)/day/system]

It assumes register: 55,296bit, Flip-

Flops: 2816FFs, #FPGA:1400.

Very Preliminary!!!

Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 22

Summary

 We have to check every electronics components using in

UX15 according to the ATLAS Standard Test Method(by

RHAWG)...

 For this 2-3years, we have a series of radiation tests for our

TGC electronics, and just have finished (just 1 week ago).

 All devices are OK to use in ATLAS experiment at TGC

position.

 In other word, we eliminate radiation non-tolerant device using

irradiation test results. (e.g. CPLD, Flush memory)

 Since there’s no configuration memory in Anti-fuse FPGA, we don’t

care configuration memory upset.

 We deeply thank each irradiation facilities and cooperators.





Radiation Tests of TGC Electronics,

2004/1/27 R. Ichimiya 23



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