# lecture07

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```					Design and Implementation of VLSI Systems
(EN1600)
lecture07

Sherief Reda
Division of Engineering, Brown University
Spring 2008

[sources: Weste/Addison Wesley – Rabaey Pearson - Baker Wiley]
MOS transistor theory

• Schedule for 4 lectures
–   Ideal (Shockley) Model
–   Non-ideal model
–   Inverter DC characteristics
–   SPICE
gate-oxide-body sandwich = capacitor
polysilicon gate
Vg < 0
Operating modes                       +
silicon dioxide insulator
p-type body
• Accumulation                       -

• Depletion
(a)
• Inversion
0 < V g < Vt
depletion region
+
-

(b)

• The charge accumulated
is proportional to the V >V g    t
inversion region
+
excess gate-channel                  -   depletion region

voltage (Vgc-Vt)
(c)
The MOS transistor has three regions of
operation
• Cut off
Vgs < Vt

• Linear (resistor):
Vgs > Vt & Vds < VSAT=Vgs-Vt
Current prop to Vds
NMOS transistor, 0.25um, Ld = 10um, W/L = 1.5, VDD
= 2.5V, VT = 0.4V

• Saturation:
Vgs > Vt and Vds ≥ VSAT=Vgs-Vt
Current is independent of Vds
How to calculate the current value?
• MOS structure looks like parallel plate
capacitor while operating in inversion
– Gate – oxide – channel
• Qchannel = CV
• C = εoxWL/tox = CoxWL (where Cox=εox/tox)
• V = Vgc – Vt = (Vgs – Vds/2) – Vt

gate
Vg
+         +
source Vgs    Cg Vgd drain
Vs      -            -     Vd
channel
n+  -              + n+
Vds
p-type body
Carrier velocity is a factor in determining the
current

• Charge is carried by electrons
• Carrier velocity v proportional to lateral E-field
between source and drain
• v = μE           μ called mobility
• E = Vds/L
• Time for carrier to cross channel:
t=L/v
I=Q/t
• Now we know
– How much charge Qchannel is in the channel
– How much time t each carrier takes to cross
Qchannel
I ds 
t
 Cox
WV  V  Vds     V
 gs              ds
            2   
t
L
  Vgs  Vt  ds Vds
V
             2
               
In linear mode (Vgs > Vt & Vds < Vgs-Vt)
Qchannel
I ds 
t
 Cox
WV  V  Vds     V
 gs              ds
            2   
t
L                            Can be ignored for small Vds

  Vgs  Vt  ds Vds
V
             2
               

For a given Vgs, Ids is proportional (linear) to Vds
In saturation mode (Vgs > Vt and Vds ≥ Vgs-Vt)
Qchannel
I ds 
t
 Cox
WV  V  Vds      V
 gs               ds
            2    
t
L
  Vgs  Vt  ds Vds
V
             2
               
V  V  Vdsat
I ds    gs                  V       pinched off
 dsat
              2      
t


V       Vt 
2
        gs
2
Now drain voltage no longer increases current
Operation modes summary


            0                Vgs  Vt      cutoff


I ds    Vgs  Vt  ds       V V  V
V
                     ds                linear
                       
2         ds dsat

     
Vgs  Vt 
2
                            Vds  Vdsat   saturation
      2
Transistor capacitance

 Gate capacitance: to body + to drain + to source
 Diffusion capacitance: source-body and drain-body capacitances
Gate capacitance as a function of Vgs

QuickTime™ and a
decompressor
are need ed to see this picture.
Source/Drain diffusion capacitance

• Csb, Cdb
• Undesirable, called parasitic
Channel-stop implant
capacitance                               AN
1
• Capacitance depends on area and            Side wall
perimeter                     W          Source
ND
– Use small diffusion nodes
Bottom
– Comparable to Cg
– Varies with process       xj   Side wall
Channel
LS                  NA
Substrate
Summary
• Covered ideal (long channel) operation (Shockley model) of
transistor
• Next time: short-channel transistors
• TA

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 views: 3 posted: 10/31/2011 language: English pages: 14