RF CMOS Integrated Circuits Design the Good the Bad and the Ugly

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					RF CMOS Integrated Circuits Design: the Good, the Bad and the Ugly
by

Dr. Neric Fong Marvell Technology Group and Carleton University
5 October, 2006. 11:00am – 12:00pm Rm 603, Chow Yei Ching Bldg Abstract:
With the availability of the high speed and low cost nanometer CMOS device, system-on-chip (SoC) has not only become a possibility, but also a necessity for many companies to achieve design wins in the highly competitive consumer electronics market. In this presentation, the design of a 90nm CMOS RF tuned amplifier is described. This circuit is used as an example to demonstrate how a textbook circuit is realized as an industrial quality integrated circuit (IC) in the SoC environment. The advantages and drawbacks of nanometer devices are examined, and the design challenges and the solutions are mentioned. The presentation is concluded with the industrial trend and the role academia play in the IC world.

Biography:
Neric Fong received his Ph.D. degree at Carleton University, Canada in 2002 for the study of lowvoltage RF and mixed-signal analog IC design in CMOS SOI technology. From 1995 to 2002, he was with Nortel Networks, Philsar (now Skyworks) and IBM for his research internships. In 2002, he joined Cognio Canada, where he developed the world’s first IEEE 802.11 a/b/g transmitter for MIMO wireless LAN application. In 2004, he joined Via Technologies in Fremont, California where he was the project leader in developing an RF CMOS transceiver for WCDMA applications. He is currently with Marvell in Santa Clara, California as a Staff Design Engineer, working on CMOS system-on-chip for WLAN applications. Academically, he holds an adjunct research professorship at Carleton University since 2003, cosupervising students in both Masters and Ph.D. levels. He is a review committee member of the IEEE international symposium of circuits and systems (ISCAS) since 2004.


				
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